Hi,
Following my previous email (which you might not have received yet, because the attached snapshot was slightly over the size limit), I have written a small patch to address the issue I found with ETMv4 decoding.
For clarity, the issue I encountered was that in EtmV4ITrcPkt::updateShortAddress, when the v_addr field is computed, it uses the old value (which is supposed to be the last broadcast address, according to the documentation).
However, when an Exact Match packet is output, the specification says that the matched address is pushed at the front of the address queue.
The v_addr field looks to me like it is the top of the address queue, so should be updated in EtmV4ITrcPacket::setAddressExactMatch, which is currently not done.
The patch I wrote replicates the address queue in the EtmV4ITrcPacket class, to update the last broadcast address accordingly when reading an exact match.
There is a bit of redundancy, because it is also done in the TrcPktDecodeEtmV4I class, but it seems to fix the problem.
You will find the patch attached to this email.
Below is the output for the section that showed an incorrect output.
Idx:4248; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004DC2DC ~[0xDC]
Idx:4250; ID:12; I_ATOM_F3 : Atom format 3.; EEN
Idx:4251; ID:12; I_ATOM_F2 : Atom format 2.; EE
Idx:4252; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004D004C ~[0x1004C]
Idx:4256; ID:12; I_ATOM_F1 : Atom format 1.; E
Idx:4257; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004DCC6C ~[0x1CC6C]
Idx:4260; ID:12; I_ATOM_F3 : Atom format 3.; EEN
Idx:4261; ID:12; I_ATOM_F3 : Atom format 3.; NNE
Idx:4262; ID:12; I_ATOM_F3 : Atom format 3.; EEN
Idx:4263; ID:12; I_ATOM_F2 : Atom format 2.; EE
Idx:4264; ID:12; I_ADDR_MATCH : Exact Address Match., [1]
Idx:4265; ID:12; I_ATOM_F1 : Atom format 1.; E
Idx:4266; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004D00F4 ~[0xF4]
The last address is constructed from 0x004D004C, which is at the top of the address queue after the Exact Match.
Before the patch, it was constructed from 0x004DCC6C, which was at the top of the address queue *before* the Exact Match, and at index 1 after.
I hope you can add this patch to the library at some point, or a modified version of it.
Best regards,
Thierry Laviron
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Hi,
I think we have discovered a bug in the ETMv4 decoder, when there is an 'exact match' packet followed by an address packet that is not 64 bit long.
Here is a faulty sample:
Idx:4248; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004DC2DC ~[0xDC]
Idx:4250; ID:12; I_ATOM_F3 : Atom format 3.; EEN
Idx:4251; ID:12; I_ATOM_F2 : Atom format 2.; EE
Idx:4252; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004D004C ~[0x1004C]
Idx:4256; ID:12; I_ATOM_F1 : Atom format 1.; E
Idx:4257; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004DCC6C ~[0x1CC6C]
Idx:4260; ID:12; I_ATOM_F3 : Atom format 3.; EEN
Idx:4261; ID:12; I_ATOM_F3 : Atom format 3.; NNE
Idx:4262; ID:12; I_ATOM_F3 : Atom format 3.; EEN
Idx:4263; ID:12; I_ATOM_F2 : Atom format 2.; EE
Idx:4264; ID:12; I_ADDR_MATCH : Exact Address Match., [1]
Idx:4265; ID:12; I_ATOM_F1 : Atom format 1.; E
Idx:4266; ID:12; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x004DCCF4 ~[0xF4]
We have 3 addresses output before the exact match; at that point the state of the address queue is
0: 0x004DCC6C
1: 0x004D004C
2: 0x004DC2DC
After the exact match packet, it should be
0: 0x004D004C
1: 0x004DCC6C
2: 0x004D004C
This means that the next address value should be compared to 0x004D004C
The next address packet is a short address, with one byte of data. It tells us bits[8:0] of the next address are 0x0F4
This means the next executed address is 0x004D00F4.
However the decoder is interpreting it as 0x004DCCF4, as if it did not update the queue.
Looking at the code, it appears the address queue does get properly updated on an exact match packet, however when reconstructing addresses, it uses an ocsd_etmv4_i_pkt::v_addr field; documentation says this is the "most recently broadcast address packet".
This v_addr field does not get updated on an exact match packet, but if I am reading the specifications right it should.
Am I right in assuming this is a bug?
I have attached the snapshot that produces the bug, and the executable that produced the trace so you can check the assembly code.
Best regards,
Thierry
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Hello Mathieu,
I've decided that currently I don't need Android. The Linux is enough.
However I have another issue. I've downloaded the perf-opencsd-master branch. I run the config with the ARCH=arm64 and CROSS_COMPLIE=aarch64-linux-gnu- and added support for Versatile board. Then I compiled kernel - everything was OK. Next I built the USB using the following instruction:
https://archlinuxarm.org/platforms/armv8/arm/juno (it works fine. The linux boot on the Juno).
Next I copied the Image file and juno.dtb into the USB but it doesn't boot. It hangs here:
initrd: address 0x0
initrd: length 0x0
PEI 1132 ms
DXE 1695 ms
BDS 368934875444 ms
BDS 368934873448 ms
BDS 1535 ms
Total Time = 368934871781 ms
linux: address 0x80080000
linux: length 0x1150200
fdt: address 0x9FE00000
fdt: length 0x5F54
Any idea what I'm doing wrong? Any help will be appreciated (I'm so close to have Juno + CoreSight + perf :) )
Regards
Marek
W dniu 2017-08-16 23:08:04 użytkownik Mathieu Poirier <mathieu.poirier(a)linaro.org> napisał:
> Hello Marek,
>
> Please CC the CoreSight mailing list when asking questions as someone
> else may also be able to answer.
>
> First and foremost I advise using the official CoreSight kernel found
> on the openCSD site [1] rather than my personal branch [2] - you
> never know what you'll get with the latter.
>
> That being said the CoreSight kernel on the openCSD site is not an
> Android kernel - it is simply a mainline kernel supplemented with
> patches that haven't made their way to mainline yet. You will have to
> either add the android patches to the CoreSight kernel or the other
> way around (CoreSight patches on android kernel).
>
> Android user space is also different and does not include the
> perf-tools. You will have to add them manually along with the
> dependencies they require. I haven't gone through that process and as
> such can't advise more on that portion.
>
> Get back to me with your questions if the above isn't sufficient.
>
> Best regards,
> Mathieu
>
> [1]. https://github.com/Linaro/OpenCSD/tree/perf-opencsd-master
> [2]. https://git.linaro.org/people/mathieu.poirier/coresight.git/
>
> On 16 August 2017 at 14:32, marekzmyslowski
> <marekzmyslowski(a)poczta.onet.pl> wrote:
> > Hello Mathieu,
> >
> > I'm sorry for bothering but I think you may be person that can help me. I'm trying to install and run Android on Juno Board r0. I tested Android 17.05 from Linaro and it works. Now I'm trying to have a perf using Coresight but I'm little confused. Do I need to build Android from Linaro and the kernel from here https://git.linaro.org/people/mathieu.poirier/coresight.git/ or here https://github.com/Linaro/OpenCSD/tree/perf-opencsd-4.12.
> > Any help with this will be appreciated :)
> >
> > Regards
> > Marek Zmysłowski
>
Hello Marek,
Please CC the CoreSight mailing list when asking questions as someone
else may also be able to answer.
First and foremost I advise using the official CoreSight kernel found
on the openCSD site [1] rather than my personal branch [2] - you
never know what you'll get with the latter.
That being said the CoreSight kernel on the openCSD site is not an
Android kernel - it is simply a mainline kernel supplemented with
patches that haven't made their way to mainline yet. You will have to
either add the android patches to the CoreSight kernel or the other
way around (CoreSight patches on android kernel).
Android user space is also different and does not include the
perf-tools. You will have to add them manually along with the
dependencies they require. I haven't gone through that process and as
such can't advise more on that portion.
Get back to me with your questions if the above isn't sufficient.
Best regards,
Mathieu
[1]. https://github.com/Linaro/OpenCSD/tree/perf-opencsd-master
[2]. https://git.linaro.org/people/mathieu.poirier/coresight.git/
On 16 August 2017 at 14:32, marekzmyslowski
<marekzmyslowski(a)poczta.onet.pl> wrote:
> Hello Mathieu,
>
> I'm sorry for bothering but I think you may be person that can help me. I'm trying to install and run Android on Juno Board r0. I tested Android 17.05 from Linaro and it works. Now I'm trying to have a perf using Coresight but I'm little confused. Do I need to build Android from Linaro and the kernel from here https://git.linaro.org/people/mathieu.poirier/coresight.git/ or here https://github.com/Linaro/OpenCSD/tree/perf-opencsd-4.12.
> Any help with this will be appreciated :)
>
> Regards
> Marek Zmysłowski
Good morning Maryem,
I am enlisting Mike's help on this one. When looking for support on
CoreSight I suggest you CC the mailing list - there is a lot of
knowledgeable people on there that can help you.
Mathieu
On 11 August 2017 at 08:57, Maryem Ayadi <maryem.ayady(a)gmail.com> wrote:
> Hi mathieu,
>
> I am working with the Opencsd library under linux in order to collect and
> decode the trace.
> I am using the Snapshots directory and I already decoded the trace packets
> from ETB_0 using ETM and captured from juno_r1_1 using the following
> command: ./tests/bin/linux64/dbg/trc_pkt_lister -ss_dir
> tests/snapshots/juno_r1_1/ -decode -src_name ETB_0 . This is an extract of
> the generic output packets:
>
>
> Idx:65507; ID:15; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0x40c5dc )
> Idx:65508; ID:15; [0x95 0x3b ]; I_ADDR_S_IS0 : Address, Short, IS0.;
> Addr=0x000000000040C4EC ~[0xEC]
> Idx:65510; ID:15; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE
> Idx:65510; ID:15; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0x40c4ec )
> Idx:65475; ID:10; OCSD_GEN_TRC_ELEM_EO_TRACE()
>
>
> Now I want to generate trace data captured with ETM and coded in assembly
> language. Is that possible without using any debugger tool such as ARM's
> DS-5 debugger tool ?
> It would be helpful to send me any steps I should follow.
>
> Best regards,
> Maryem Ayadi
>
Hi Mathieu,
I'm trying to make Coresight along with perf and OpenCSD working in
some internal project of Spreadtrum recently. As the kernel we're
using in-house is v4.4.49 which doesn't support using CoreSight with
perf tools, so I got the internal kernel merged with LSK4.4 [1].
Now I can collect trace with the command
'perf record -e cs_etm/(a)10003000.etb/ --per-thread uname'
on an our *ARM64* platform, the 'perf' was compiled from perf-opencsd-4.12 [2].
But after operated in this way on our *32-bit ARM* platform, I
received the following error:
perf record -e cs_etm/(a)10003000.etb/ --per-thread uname
event syntax error: 'cs_etm/(a)10003000.etb/'
\___ parser error
As I mentioned above the perf tool was compiled from perf-opencsd-4.12
with a 32-bit arm toolchain and kernel source code was also the same.
The only possible reason I can think out is that I have to backport
some patchs for supporting using ETMv3 with perf tools?
Thanks,
Chunyan
[1] https://git.linaro.org/kernel/linux-linaro-stable.git/commit/?h=linux-linar…
[2] https://github.com/Linaro/OpenCSD/commits/perf-opencsd-4.12
Hi Maryem,
CSAL is a library can be used to program up CoreSight trace components
and subsequently extract the trace data through the register
interface. This library principally manipulates the register sets of
Coresight components. This can be used in bare metal systems or on
Linux by mmaping the hardware memory locations of the components. The
library provides a few worked example programs illustrating the
programming and extraction of trace data.
OpenCSD is a library that will process captured trace data into a
generic output format - this is usually a list of instruction address
ranges representing executed code.
OpenCSD does not have the capability to program trace hardware for
capture, nor convert the processed trace data into assembly language.
This must be done using client programs. The DS-5 dumps you refer to
were created using ARM's DS-5 debugger tool.
The key point here is that both CSAL and OpenCSD are libraries that
are to be used as part of a larger program.
For example in the perf-opencsd-master Linux kernel tree we provide
extensions to perf (which does not use CSAL, but uses the linux
CoreSight drivers directly) that will capture trace data, and
subsequently use the OpenCSD library to process that data. Using the
'perf script' command, and an appropriate python script (also supplied
in the perf-opencsd-master), it is possible to process the trace data
captured by perf, through the OpenCSD library to generate traced
instruction ranges and then passthe traced instruction ranges to
objdump to output a disassembled sequence.
Best Regards
Mike
On 10 August 2017 at 14:49, Maryem Ayadi <maryem.ayady(a)gmail.com> wrote:
> Hi Mark,
>
> I am working with the Opencsd library under linux in order to collect and
> decode the trace.
> I just discovered The CoreSight Access Library (CSAL) and I want to know
> what's the difference between both libraries.
> Besides, is it possible to work only with the opencsd library to collect and
> decode traces on-target?
>
> I am also trying to generate trace data coded in assembly language like the
> contents of the files existing within
> decoder/tests/snapshots/juno_r1_1/ds-5-dumps in the Opencsd library. It
> would be helpful to send me any steps I should follow.
>
> Best regards,
> Maryem Ayadi
--
Mike Leach
Principal Engineer, ARM Ltd.
Blackburn Design Centre. UK
On 25 July 2017 at 21:49, yoma sophian <sophian.yoma(a)gmail.com> wrote:
> hi Mathieu:
>>
>> Get (and recompile) the latest revision of the openCSD library - that
>> should do the trick.
> after using the latest revision of the opcdCSD library, compile is pass.
> But I have some question about trace collection and decode flow
> 1. for trace collection, shall we ask perf to save some other places?
> such as USB or somewhere alse
We welcome patches.
> 2. from HOWTO document, is perf.data the trace data from ETM?
The perf.data file contains the trace data from the ETM devices, the
metadata associated with the ETM configuration and miscellaneous perf
events recorded during the session.
> 3. Why we need .debug directory?
That is where all the binaries that were involved in the trace session
are collected. Those are needed by the decoding library for proper
handling of the trace data.
> thanks ur help in advance.
+ coresight mail list
On 9 August 2017 at 18:54, Maryem Ayadi <maryem.ayady(a)gmail.com> wrote:
> Good morning,
Hi,
>
> I am focusing on OpenCSD library and looking for information about the
> difference between OpenCSD and CSAL library.
> As I noticed, CSAL is for interacting directly with CoreSight trace devices
> on target and programing the tracers while OpenCSD is for collecting the
> trace and decode it.
> Is there any other information you can provide me ?
Have you ever accessed to OpenCSD github [1]? Probably you can get
more information about OpenCSD from there.
I'm not familiar with CSAL though, I can forward an Mike's email in
which he introduced a lot about that library.
I suggest you to cc coresight mail list when you have some question
about CoreSight. There is a lot of knowledgeable people on there.
Regards,
Chunyan
[1] https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md
>
> Best Regards,
> Maryem Ayadi
>
> 2017-08-04 6:42 GMT+01:00 Chunyan Zhang <zhang.chunyan(a)linaro.org>:
>>
>> On 3 August 2017 at 22:47, Maryem Ayadi <maryem.ayady(a)gmail.com> wrote:
>> > Good morning,
>>
>> Hi,
>>
>> >
>> > I am doing an internship at STMicroelectronics and I am new to decoding
>> > traces.
>> > I just red your article entitled "System Trace Module (STM) and its
>> > usage"
>> > and the article "HOWTO-using the library with perf" and started working
>> > on
>> > System Trace Module.
>> > Unfortunately, I can't find stm_source directory. Is it only available
>> > on
>> > certain Kernel versions ?
>>
>> Yes, those patches got merged in v4.10-rc1, and you have to ensure
>> 'STM_SOURCE_FTRACE' is selected when compiling the kernel code.
>>
>> Chunyan
>>
>> >
>> > Best Regards,
>> > Maryem Ayady
>
>
Hello everyone,
Thanks for making this lovely tools, it looks very useful.
I am attempting to use OpenCSD to decode some traces I pulled off of an ARM DSTREAM using it's RDDI interface. However I've run into some trouble, and I have a few questions.
In the ocsd_etmv3_cfg struct, what register is meant by the reg_ctrl? Do they mean the ETM's main control register?
What config settings does TPIU TDATA need to be decoded with? If anyone is familiar with the API, does data from RDDI need any pre-processing before giving to openCSD? Do I need to remove the DSTREAM trace data block footer? A few of the docs reference raw DSTREAm data, so I'm a little hopeful that there's some documentation I've just missed.
- Thanks all!
