CoreSight

coresight@lists.linaro.org

6 participants
2649 discussions

by Al Grant

Hi, Has anyone got CoreSight DTS support for the Hi3660 as used on the HiKey 960 board? Hopefully it would be similar to the Hi6220. Al

8 years, 5 months

Follow-up on CoreSight meeting

by Mathieu Poirier

Good morning Reza, As highlighted in yesterday's email the best way to get involved in the CoreSight project is to subscribe to the mailing list [1] and attend the meeting we hold every two weeks in the #linaro-coresight channel on freenode. The next meeting is scheduled for October 18th @ 4PM (UTC). As for STM, Chunyan wrote documentation that is available in the kernel tree [2]. It would be interesting if you guys could come up with a list of items that you want to see addressed. From there we could post them to the perf-opencsd wiki (to be officially published imminently) and have some sort of a tick list for items that are currently being worked on and those up for grab. Best regards, Mathieu [1]. https://lists.linaro.org/mailman/listinfo/coresight [2]. http://elixir.free-electrons.com/linux/latest/source/Documentation/trace/st…

8 years, 5 months

[PATCH] opencsd: Moving perf-opencsd kernel branches to their own directory

by Mathieu Poirier

Modifyting instructions to point to the new kernel repository on gitHub so that kernel related branches in the openCSD repository can be delete. Signed-off-by: Mathieu Poirier <mathieu.poirier(a)linaro.org> --- HOWTO.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/HOWTO.md b/HOWTO.md index 835def5765e6..dd4fe2057548 100644 --- a/HOWTO.md +++ b/HOWTO.md @@ -7,8 +7,8 @@ This HOWTO explains how to use the perf cmd line tools and the openCSD library to collect and extract program flow traces generated by the CoreSight IP blocks on a Linux system. The examples have been generated using an aarch64 Juno-r0 platform. All information is considered accurate and tested -using library version v0.6 and the `perf-opencsd-master` branch on the -[OpenCSD github repository][1]. +using the latest version of the library and the `master` branch on the +[perf-opencsd github repository][1]. On Target Trace Acquisition - Perf Record @@ -280,7 +280,7 @@ As stated above not all the pieces of the solution have been upstreamed. To get all the components the latest `perf-opencsd-master` needs to be obtained: - linaro@t430:~/linaro/coresight$ git clone -b perf-opencsd-master https://github.com/Linaro/OpenCSD.git perf-opencsd-master + linaro@t430:~/linaro/coresight$ git clone -b perf-opencsd-master https://github.com/Linaro/perf-opencsd.git perf-opencsd-master ... ... @@ -586,7 +586,7 @@ Best regards, *The Linaro CoreSight Team* -------------------------------------- -[1]: https://github.com/Linaro/OpenCSD "OpenCSD Github" +[1]: https://github.com/Linaro/perf-opencsd "perf-opencsd Github" [2]: http://people.linaro.org/~mathieu.poirier/openCSD/uname.v4.user.sept20.tgz -- 2.7.4

8 years, 5 months

Re: [EXTERNAL] Re: [PATCH v2 01/23] perf tools: Add initial hooks for decoding coresight traces

by Mathieu Poirier

On 4 October 2017 at 15:30, Jeremiassen, Tor <tor(a)ti.com> wrote: > As far as I could tell, the C flags when compiling cs-etm.c comes from CFLAGS-$(CONFIG_AUXTRACE), while the C flags that are used when compiling auxtrace.c come from CFLAGS. > > That's why it has to be in both. My compilation failed otherwise. Even nowadays? Can you check with my branch? > > Tor > > -----Original Message----- > From: Mathieu Poirier [mailto:mathieu.poirier@linaro.org] > Sent: Wednesday, October 4, 2017 4:24 PM > To: Jeremiassen, Tor > Cc: coresight(a)lists.linaro.org > Subject: [EXTERNAL] Re: [PATCH v2 01/23] perf tools: Add initial hooks for decoding coresight traces > > On Fri, Sep 22, 2017 at 04:03:18AM -0500, Tor Jeremiassen wrote: >> Adds new file cs-etm.c that adds auxtrace info event handler for >> cs-etm (coresight ETM) traces, event handling data structures and the >> necessary callback functions required to be provided in the auxtrace struct. >> >> The coresight trace decoding is enabled by setting the CSTRACE_PATH >> environment variable to point to the decoder subdirectory in the >> coresight trace decoder library. >> >> Signed-off-by: Tor Jeremiassen <tor(a)ti.com> >> --- >> tools/perf/Makefile.config | 5 + >> tools/perf/util/Build | 5 + >> tools/perf/util/auxtrace.c | 2 + >> tools/perf/util/cs-etm.c | 230 +++++++++++++++++++++++++++++++++++++++++++++ >> tools/perf/util/cs-etm.h | 16 ++++ >> 5 files changed, 258 insertions(+) >> create mode 100644 tools/perf/util/cs-etm.c >> >> diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config >> index 63f534a..d1a83aa 100644 >> --- a/tools/perf/Makefile.config >> +++ b/tools/perf/Makefile.config >> @@ -339,6 +339,11 @@ ifeq ($(feature-setns), 1) >> $(call detected,CONFIG_SETNS) >> endif >> >> +ifdef CSTRACE_PATH >> + CFLAGS += -DHAVE_CSTRACE_SUPPORT >> + CFLAGS-$(CONFIG_AUXTRACE) += -DHAVE_CSTRACE_SUPPORT > > I couldn't figure out what the above line was doing so I removed it. > >> +endif >> + >> ifndef NO_LIBELF >> CFLAGS += -DHAVE_LIBELF_SUPPORT >> EXTLIBS += -lelf >> diff --git a/tools/perf/util/Build b/tools/perf/util/Build index >> 94518c1..23439f4 100644 >> --- a/tools/perf/util/Build >> +++ b/tools/perf/util/Build >> @@ -83,6 +83,11 @@ libperf-$(CONFIG_AUXTRACE) += auxtrace.o >> libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ >> libperf-$(CONFIG_AUXTRACE) += intel-pt.o >> libperf-$(CONFIG_AUXTRACE) += intel-bts.o >> + >> +ifdef CSTRACE_PATH >> +libperf-$(CONFIG_AUXTRACE) += cs-etm.o endif >> + >> libperf-y += parse-branch-options.o >> libperf-y += dump-insn.o >> libperf-y += parse-regs-options.o >> diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c >> index 5547457..37f9d08 100644 >> --- a/tools/perf/util/auxtrace.c >> +++ b/tools/perf/util/auxtrace.c >> @@ -55,6 +55,7 @@ >> #include "debug.h" >> #include <subcmd/parse-options.h> >> >> +#include "cs-etm.h" >> #include "intel-pt.h" >> #include "intel-bts.h" >> >> @@ -914,6 +915,7 @@ int perf_event__process_auxtrace_info(struct perf_tool *tool __maybe_unused, >> case PERF_AUXTRACE_INTEL_BTS: >> return intel_bts_process_auxtrace_info(event, session); >> case PERF_AUXTRACE_CS_ETM: >> + return cs_etm__process_auxtrace_info(event, session); >> case PERF_AUXTRACE_UNKNOWN: >> default: >> return -EINVAL; >> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c new >> file mode 100644 index 0000000..e3f4e86 >> --- /dev/null >> +++ b/tools/perf/util/cs-etm.c >> @@ -0,0 +1,230 @@ >> +/* >> + * Copyright(C) 2015-2017 Linaro Limited. All rights reserved. >> + * Author: Tor Jeremiassen <tor(a)ti.com> >> + * >> + * This program is free software; you can redistribute it and/or >> +modify it >> + * under the terms of the GNU General Public License version 2 as >> +published by >> + * the Free Software Foundation. >> + * >> + * This program is distributed in the hope that it will be useful, >> +but WITHOUT >> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY >> +or >> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public >> +License for >> + * more details. >> + * >> + * You should have received a copy of the GNU General Public License >> +along with >> + * this program. If not, see <http://www.gnu.org/licenses/>. >> + */ >> + >> +#include <linux/bitops.h> >> +#include <linux/err.h> >> +#include <linux/kernel.h> >> +#include <linux/log2.h> >> +#include <linux/types.h> >> + >> +#include <stdlib.h> >> + >> +#include "auxtrace.h" >> +#include "color.h" >> +#include "cs-etm.h" >> +#include "debug.h" >> +#include "evlist.h" >> +#include "intlist.h" >> +#include "machine.h" >> +#include "perf.h" >> +#include "thread.h" >> +#include "thread_map.h" >> +#include "thread-stack.h" >> +#include "util.h" >> + >> +struct cs_etm_auxtrace { >> + struct auxtrace auxtrace; >> + struct auxtrace_queues queues; >> + struct auxtrace_heap heap; >> + u64 **metadata; >> + u32 auxtrace_type; >> + struct perf_session *session; >> + struct machine *machine; >> + struct perf_evsel *switch_evsel; >> + struct thread *unknown_thread; >> + uint32_t num_cpu; >> + bool timeless_decoding; >> + bool sampling_mode; >> + bool snapshot_mode; >> + bool data_queued; >> + bool synth_needs_swap; >> + bool sample_instructions; >> + u64 instructions_sample_type; >> + u64 instructions_sample_period; >> + u64 instructions_id; >> + struct itrace_synth_opts synth_opts; >> + unsigned int pmu_type; >> + u64 kernel_start; >> +}; >> + >> +struct cs_etm_queue { >> + struct cs_etm_auxtrace *etm; >> + unsigned int queue_nr; >> + struct auxtrace_buffer *buffer; >> + const struct cs_etm_state *state; >> + union perf_event *event_buf; >> + bool on_heap; >> + bool step_through_buffers; >> + bool use_buffer_pid_tid; >> + pid_t pid, tid; >> + int cpu; >> + struct thread *thread; >> + u64 time; >> + u64 timestamp; >> + bool stop; >> + struct cs_etm_decoder *decoder; >> + u64 offset; >> + bool eot; >> +}; >> + >> +static int cs_etm__flush_events(struct perf_session *session, >> + struct perf_tool *tool) >> +{ >> + (void) session; >> + (void) tool; >> + return 0; >> +} >> + >> +static void cs_etm__free_queue(void *priv) { >> + struct cs_etm_queue *etmq = priv; >> + >> + if (!etmq) >> + return; >> + >> + thread__zput(etmq->thread); >> + free(etmq); >> +} >> + >> +static void cs_etm__free_events(struct perf_session *session) { >> + struct cs_etm_auxtrace *aux = container_of(session->auxtrace, >> + struct cs_etm_auxtrace, >> + auxtrace); >> + struct auxtrace_queues *queues = &aux->queues; >> + unsigned int i; >> + >> + for (i = 0; i < queues->nr_queues; i++) { >> + cs_etm__free_queue(queues->queue_array[i].priv); >> + queues->queue_array[i].priv = NULL; >> + } >> + >> + auxtrace_queues__free(queues); >> +} >> + >> +static void cs_etm__free(struct perf_session *session) { >> + struct cs_etm_auxtrace *aux = container_of(session->auxtrace, >> + struct cs_etm_auxtrace, >> + auxtrace); >> + auxtrace_heap__free(&aux->heap); >> + cs_etm__free_events(session); >> + session->auxtrace = NULL; >> + >> + zfree(&aux); >> +} >> + >> +static int cs_etm__process_event(struct perf_session *session, >> + union perf_event *event, >> + struct perf_sample *sample, >> + struct perf_tool *tool) >> +{ >> + (void) session; >> + (void) event; >> + (void) sample; >> + (void) tool; >> + return 0; >> +} >> + >> +static int cs_etm__process_auxtrace_event(struct perf_session *session, >> + union perf_event *event, >> + struct perf_tool *tool) >> +{ >> + (void) session; >> + (void) event; >> + (void) tool; >> + return 0; >> +} >> + >> +int cs_etm__process_auxtrace_info(union perf_event *event, >> + struct perf_session *session) >> +{ >> + struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info; >> + size_t event_header_size = sizeof(struct perf_event_header); >> + size_t info_header_size; >> + size_t total_size = auxtrace_info->header.size; >> + struct cs_etm_auxtrace *etm = NULL; >> + int err = 0; >> + >> + /* >> + * sizeof(auxtrace_info_event::type) + >> + * sizeof(auxtrace_info_event::reserved) == 8 >> + */ >> + info_header_size = 8; >> + >> + if (total_size < (event_header_size + info_header_size)) >> + return -EINVAL; >> + >> + etm = zalloc(sizeof(*etm)); >> + >> + if (!etm) >> + return -ENOMEM; >> + >> + err = auxtrace_queues__init(&etm->queues); >> + if (err) >> + goto err_free_etm; >> + >> + etm->unknown_thread = thread__new(999999999, 999999999); >> + if (!etm->unknown_thread) { >> + err = -ENOMEM; >> + goto err_free_queues; >> + } >> + >> + err = thread__set_comm(etm->unknown_thread, "unknown", 0); >> + if (err) >> + goto err_delete_thread; >> + >> + etm->session = session; >> + etm->machine = &session->machines.host; >> + etm->kernel_start = machine__kernel_start(etm->machine); >> + >> + if (thread__init_map_groups(etm->unknown_thread, >> + etm->machine)) { >> + err = -ENOMEM; >> + goto err_delete_thread; >> + } >> + >> + etm->auxtrace_type = auxtrace_info->type; >> + >> + etm->auxtrace.process_event = cs_etm__process_event; >> + etm->auxtrace.process_auxtrace_event = cs_etm__process_auxtrace_event; >> + etm->auxtrace.flush_events = cs_etm__flush_events; >> + etm->auxtrace.free_events = cs_etm__free_events; >> + etm->auxtrace.free = cs_etm__free; >> + session->auxtrace = &etm->auxtrace; >> + >> + if (dump_trace) >> + return 0; >> + >> + err = auxtrace_queues__process_index(&etm->queues, session); >> + if (err) >> + goto err_delete_thread; >> + >> + etm->data_queued = etm->queues.populated; >> + >> + return 0; >> + >> +err_delete_thread: >> + thread__delete(etm->unknown_thread); >> +err_free_queues: >> + auxtrace_queues__free(&etm->queues); >> + session->auxtrace = NULL; >> +err_free_etm: >> + zfree(&etm); >> + >> + return err; >> +} >> diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h index >> 3cc6bc3..9e43ede 100644 >> --- a/tools/perf/util/cs-etm.h >> +++ b/tools/perf/util/cs-etm.h >> @@ -18,6 +18,9 @@ >> #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__ #define >> INCLUDE__UTIL_PERF_CS_ETM_H__ >> >> +#include "util/event.h" >> +#include "util/session.h" >> + >> /* Versionning header in case things need tro change in the future. That way >> * decoding of old snapshot is still possible. >> */ >> @@ -71,4 +74,17 @@ static const u64 __perf_cs_etmv4_magic = 0x4040404040404040ULL; >> #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64)) #define >> CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64)) >> >> +#ifdef HAVE_CSTRACE_SUPPORT >> +int cs_etm__process_auxtrace_info(union perf_event *event, >> + struct perf_session *session); >> +#else >> +static inline int cs_etm__process_auxtrace_info(union perf_event *event, >> + struct perf_session *session) >> +{ >> + (void) event; >> + (void) session; >> + return -1; >> +} >> +#endif >> + >> #endif >> -- >> 2.7.4 >> >> _______________________________________________ >> CoreSight mailing list >> CoreSight(a)lists.linaro.org >> https://lists.linaro.org/mailman/listinfo/coresight

8 years, 5 months

Re: Re: Re: Access to QDSS

by marekzmyslowski

RTFM to me :) Solution was easy: echo 1 > /sys/kernel/debug/coresight_cpu_debug/enable Regards Marek W dniu 2017-10-02 19:16:12 użytkownik Mathieu Poirier <mathieu.poirier(a)linaro.org> napisał: > On 2 October 2017 at 09:41, marekzmyslowski > <marekzmyslowski(a)poczta.onet.pl> wrote: > > Hello Mathieu, > > > > I'm trying to use CSAL for DragonBoard. The fisrt thing there is rom_init. According to the docs, the rom that needs to be mmaped is 0x800000. Is there any way to check if the power domain or clock turned om? > > There is no way to check from user space. When using the CSAL people > will typically connect to the board using a Dstream (or another Jtag > solution). That typically switch on the power domain and the required > clock, given the initialisation script for the board has done that > correctly. > > The dragonboard is popular and ubiquitous, it shouldn't be hard to > find a Jtag init script on the internet somewhere. If you don't have > a Jtag you can read the Jtag init script for that board and enact the > same operations by mmap'ing memory areas and flipping bits. > > > > > Regards > > Marek > > > > W dniu 2017-10-02 16:50:08 użytkownik Mathieu Poirier <mathieu.poirier(a)linaro.org> napisał: > >> On 2 October 2017 at 02:15, marekzmyslowski > >> <marekzmyslowski(a)poczta.onet.pl> wrote: > >> > Hello, > >> > > >> > I'm trying to get access to Qualcomm Debug Subsystem on my DragonBoard 410c by using the mmap. Just want to read data available in DQSS_DAPROM. However when I try to do that, the system is rebooting. Any idea why I can't do that? > >> > > >> > int size = 4096; > >> > off_t addr_to_map = 0x00800000; //according to docs this is an address of QDSS_DAPROM > >> > > >> > int mem_fd = open("/dev/mem", O_RDWR); > >> > localv = mmap(0, size, PROT_READ, MAP_SHARED, mem_fd, addr_to_map); > >> > printf ("mmap completed %p.\n", localv); > >> > tab = (unsigned int *)localv; > >> > printf ("%u\n", tab[0]); > >> > > >> > Result of my application execution: > >> > mmap completed 0x7fa29f0000.[ 484.585864] Synchronous External Abort: synchronous external abort (0x92000010) at 0x0000007fa29f0000 > >> > >> > >> This is usually an indication the memory area you are trying to reach > >> is not accessible - either the power domain hasn't been switched on or > >> the clock(s) aren't enabled. Is there a device driver specific to the > >> DQSS_DAPROM? > >> > >> > > >> > Regards > >> > Marek > >> > > >> > Linux linaro-developer 4.14.0-rc1+ #2 SMP PREEMPT Thu Sep 21 10:39:33 CEST 2017 aarch64 GNU/Linux > >> > > >> > _______________________________________________ > >> > CoreSight mailing list > >> > CoreSight(a)lists.linaro.org > >> > https://lists.linaro.org/mailman/listinfo/coresight > >> > > > > > > >

8 years, 5 months

Re: Re: Access to QDSS

by marekzmyslowski

Hello Mathieu, I'm trying to use CSAL for DragonBoard. The fisrt thing there is rom_init. According to the docs, the rom that needs to be mmaped is 0x800000. Is there any way to check if the power domain or clock turned om? Regards Marek W dniu 2017-10-02 16:50:08 użytkownik Mathieu Poirier <mathieu.poirier(a)linaro.org> napisał: > On 2 October 2017 at 02:15, marekzmyslowski > <marekzmyslowski(a)poczta.onet.pl> wrote: > > Hello, > > > > I'm trying to get access to Qualcomm Debug Subsystem on my DragonBoard 410c by using the mmap. Just want to read data available in DQSS_DAPROM. However when I try to do that, the system is rebooting. Any idea why I can't do that? > > > > int size = 4096; > > off_t addr_to_map = 0x00800000; //according to docs this is an address of QDSS_DAPROM > > > > int mem_fd = open("/dev/mem", O_RDWR); > > localv = mmap(0, size, PROT_READ, MAP_SHARED, mem_fd, addr_to_map); > > printf ("mmap completed %p.\n", localv); > > tab = (unsigned int *)localv; > > printf ("%u\n", tab[0]); > > > > Result of my application execution: > > mmap completed 0x7fa29f0000.[ 484.585864] Synchronous External Abort: synchronous external abort (0x92000010) at 0x0000007fa29f0000 > > > This is usually an indication the memory area you are trying to reach > is not accessible - either the power domain hasn't been switched on or > the clock(s) aren't enabled. Is there a device driver specific to the > DQSS_DAPROM? > > > > > Regards > > Marek > > > > Linux linaro-developer 4.14.0-rc1+ #2 SMP PREEMPT Thu Sep 21 10:39:33 CEST 2017 aarch64 GNU/Linux > > > > _______________________________________________ > > CoreSight mailing list > > CoreSight(a)lists.linaro.org > > https://lists.linaro.org/mailman/listinfo/coresight >

8 years, 5 months

Access to QDSS

by marekzmyslowski

Hello, I'm trying to get access to Qualcomm Debug Subsystem on my DragonBoard 410c by using the mmap. Just want to read data available in DQSS_DAPROM. However when I try to do that, the system is rebooting. Any idea why I can't do that? int size = 4096; off_t addr_to_map = 0x00800000; //according to docs this is an address of QDSS_DAPROM int mem_fd = open("/dev/mem", O_RDWR); localv = mmap(0, size, PROT_READ, MAP_SHARED, mem_fd, addr_to_map); printf ("mmap completed %p.\n", localv); tab = (unsigned int *)localv; printf ("%u\n", tab[0]); Result of my application execution: mmap completed 0x7fa29f0000.[ 484.585864] Synchronous External Abort: synchronous external abort (0x92000010) at 0x0000007fa29f0000 Regards Marek Linux linaro-developer 4.14.0-rc1+ #2 SMP PREEMPT Thu Sep 21 10:39:33 CEST 2017 aarch64 GNU/Linux

8 years, 5 months

Re: Re: Access to QDSS

by marekzmyslowski

Hi Leo, Busybox gives the same results: root@linaro-developer:~# busybox devmem 0x00800000 [ 1713.501755] Synchronous External Abort: synchronous external abort (0x92000010) at 0x0000007fbb6eb000 How this clock can be enabled? I though it is already enabled. I used default configuration for db410c and it includes the msm8916.dtsi file. Regards Marek W dniu 2017-10-02 12:02:55 użytkownik Leo Yan <leo.yan(a)linaro.org> napisał: > On Mon, Oct 02, 2017 at 11:15:27AM +0200, marekzmyslowski wrote: > > Hello, > > > > I'm trying to get access to Qualcomm Debug Subsystem on my DragonBoard 410c by using the mmap. Just want to read data available in DQSS_DAPROM. However when I try to do that, the system is rebooting. Any idea why I can't do that? > > > > int size = 4096; > > off_t addr_to_map = 0x00800000; //according to docs this is an address of QDSS_DAPROM > > > > int mem_fd = open("/dev/mem", O_RDWR); > > localv = mmap(0, size, PROT_READ, MAP_SHARED, mem_fd, addr_to_map); > > printf ("mmap completed %p.\n", localv); > > tab = (unsigned int *)localv; > > printf ("%u\n", tab[0]); > > > > Result of my application execution: > > mmap completed 0x7fa29f0000.[ 484.585864] Synchronous External Abort: synchronous external abort (0x92000010) at 0x0000007fa29f0000 > > Seems this external exception relate with clock, so need enable > RPM_QDSS_CLK clock firstly? > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arc… > > Thanks, > Leo Yan >

8 years, 5 months

New perf-opencsd repo on gitHub

by Mathieu Poirier

Good day all, As discussed in the meeting yesterday I have started a new gitHub repository [1] to host the perf-opencsd kernel. Right now it has all the same kernel branches as found on the openCSD repository. I have also added a small wiki that gives people a little bit of information on the repository itself. Note that the openCSD repository hasn't been modified yet and that *everything* in the perf-opencsd is currently considered experimental. I am sharing this early to give people a chance to comment on the structure, naming and whatever they want to see modified. Regards, Mathieu [1]. https://github.com/Linaro/perf-opencsd

8 years, 5 months

[PATCH 1/2] perf inject: correct recording of branch address and destination

by Sebastian Pop

ARM ETM traces contain packets of executed instructions. The addresses recorded in the trace correspond to the beginning and one instruction past the end of the block of executed instructions. In order to record the address and destination of executed branches, keep track of two packets: the jump occurs from the last executed instruction of the previous packet to the address of the first instruction in the current packet. Signed-off-by: Sebastian Pop <s.pop(a)samsung.com> Signed-off-by: Brian Rzycki <b.rzycki(a)samsung.com> --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 12 ++++ tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 1 + tools/perf/util/cs-etm.c | 91 +++++++++++++++++-------- 3 files changed, 75 insertions(+), 29 deletions(-) diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c index b4cbf4c..6164bfe 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -143,6 +143,18 @@ static int cs_etm_decoder__buffer_packet(struct cs_etm_decoder *decoder, decoder->packet_buffer[et].sample_type = sample_type; decoder->packet_buffer[et].start_addr = elem->st_addr; decoder->packet_buffer[et].end_addr = elem->en_addr; + switch (elem->last_i_type) { + case OCSD_INSTR_BR: + case OCSD_INSTR_BR_INDIRECT: + decoder->packet_buffer[et].last_instruction_is_branch = true; + break; + case OCSD_INSTR_OTHER: + case OCSD_INSTR_ISB: + case OCSD_INSTR_DSB_DMB: + default: + decoder->packet_buffer[et].last_instruction_is_branch = false; + break; + } decoder->packet_buffer[et].exc = false; decoder->packet_buffer[et].exc_ret = false; decoder->packet_buffer[et].cpu = *((int*)inode->priv); diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h index d15a288..4fd5a9b 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h @@ -49,6 +49,7 @@ struct cs_etm_packet { enum cs_etm_sample_type sample_type; uint64_t start_addr; uint64_t end_addr; + bool last_instruction_is_branch; bool exc; bool exc_ret; int cpu; diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 8270203..c99b728 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -104,6 +104,10 @@ struct cs_etm_queue { * inserted. */ size_t last_branch_pos; + /* + * A pointer to the last and current decoded packets. + */ + struct cs_etm_packet *prev_packet, *packet; }; static int cs_etm__get_trace(struct cs_etm_buffer *buff, struct cs_etm_queue *etmq); @@ -226,6 +230,8 @@ static void cs_etm__free_queue(void *priv) zfree(&etmq->event_buf); zfree(&etmq->last_branch); zfree(&etmq->last_branch_rb); + zfree(&etmq->prev_packet); + zfree(&etmq->packet); zfree(&etmq->chain); free(etmq); } @@ -392,6 +398,7 @@ static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm, if (etm->synth_opts.last_branch) { size_t sz = sizeof(struct branch_stack); + size_t szp = sizeof(struct cs_etm_packet); sz += etm->synth_opts.last_branch_sz * sizeof(struct branch_entry); @@ -401,6 +408,12 @@ static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm, etmq->last_branch_rb = zalloc(sz); if (!etmq->last_branch_rb) goto out_free; + etmq->prev_packet = zalloc(szp); + if (!etmq->prev_packet) + goto out_free; + etmq->packet = zalloc(szp); + if (!etmq->packet) + goto out_free; } etmq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE); @@ -451,6 +464,8 @@ static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm, zfree(&etmq->event_buf); zfree(&etmq->last_branch); zfree(&etmq->last_branch_rb); + zfree(&etmq->prev_packet); + zfree(&etmq->packet); zfree(&etmq->chain); free(etmq); return NULL; @@ -594,8 +609,7 @@ static inline void cs_etm__reset_last_branch_rb(struct cs_etm_queue *etmq) etmq->last_branch_rb->nr = 0; } -static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq, - struct cs_etm_packet *packet) +static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq) { struct branch_stack *bs = etmq->last_branch_rb; struct branch_entry *be; @@ -611,10 +625,16 @@ static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq, etmq->last_branch_pos -= 1; - be = &bs->entries[etmq->last_branch_pos]; - be->from = packet->start_addr; - be->to = packet->end_addr; - /* No support for mispredict */ + be = &bs->entries[etmq->last_branch_pos]; + + /* + * The FROM address needs to be the instruction before the end of the + * packet at END_ADDR: substract from END_ADDR the size of the last + * instruction: 4 bytes. + */ + be->from = etmq->prev_packet->end_addr - 4; + be->to = etmq->packet->start_addr; + /* No support for mispredict. */ be->flags.mispred = 0; be->flags.predicted = 1; @@ -721,13 +741,13 @@ static struct cs_etm_cache_entry *cs_etm__cache_lookup(struct dso *dso, } #endif -static int cs_etm__synth_instruction_sample(struct cs_etm_queue *etmq, - struct cs_etm_packet *packet) +static int cs_etm__synth_instruction_sample(struct cs_etm_queue *etmq) { int ret = 0; struct cs_etm_auxtrace *etm = etmq->etm; union perf_event *event = etmq->event_buf; struct perf_sample sample = {.ip = 0,}; + struct cs_etm_packet *packet = etmq->packet; uint64_t start_addr = packet->start_addr; uint64_t end_addr = packet->end_addr; @@ -941,17 +961,18 @@ static int cs_etm__synth_events(struct cs_etm_auxtrace *etm, static int cs_etm__sample(struct cs_etm_queue *etmq, int *cpu) { - //const struct cs_etm_state *state = etmq->state; - struct cs_etm_packet packet; - //struct cs_etm_auxtrace *etm = etmq->etm; - int err; + struct cs_etm_auxtrace *etm = etmq->etm; + struct cs_etm_packet *tmp; + int err = cs_etm_decoder__get_packet(etmq->decoder, etmq->packet); - err = cs_etm_decoder__get_packet(etmq->decoder,&packet); - // if there is no sample, it returns err = -1, no real error + /* + * If there is no sample, it returns err = -1, no real error. + */ if (err) return err; - if (etmq->etm->synth_opts.last_branch) { - *cpu = packet.cpu; + + if (etm->synth_opts.last_branch) { + *cpu = etmq->packet->cpu; /* * FIXME: as the trace sampling does not work for now, (for @@ -961,17 +982,30 @@ static int cs_etm__sample(struct cs_etm_queue *etmq, int *cpu) * should be rewritten as "if reached sampling period". */ if (etmq->last_branch_rb->nr == - etmq->etm->synth_opts.last_branch_sz) { - err = cs_etm__synth_instruction_sample(etmq, &packet); + etm->synth_opts.last_branch_sz) { + err = cs_etm__synth_instruction_sample(etmq); if (err) return err; } - cs_etm__update_last_branch_rb(etmq, &packet); - } else if (packet.sample_type & CS_ETM_RANGE) { - err = cs_etm__synth_instruction_sample(etmq,&packet); - if (err) - return err; - } + /* + * Record a branch when the last instruction in PREV_PACKET is a + * branch. + */ + if (etmq->prev_packet->last_instruction_is_branch) + cs_etm__update_last_branch_rb(etmq); + + /* + * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for + * the next incoming packet. + */ + tmp = etmq->packet; + etmq->packet = etmq->prev_packet; + etmq->prev_packet = tmp; + } else if (etmq->packet->sample_type & CS_ETM_RANGE) { + err = cs_etm__synth_instruction_sample(etmq); + if (err) + return err; + } return 0; } @@ -1016,15 +1050,14 @@ static int cs_etm__run_decoder(struct cs_etm_queue *etmq, u64 *timestamp) * buffer at the end of the trace. */ if (etmq->etm->synth_opts.last_branch) { - struct cs_etm_packet packet; struct branch_stack *bs = etmq->last_branch_rb; struct branch_entry *be = &bs->entries[etmq->last_branch_pos]; - packet.cpu = cpu; - packet.start_addr = be->from; - packet.end_addr = be->to; + etmq->packet->cpu = cpu; + etmq->packet->start_addr = be->to; + etmq->packet->end_addr = be->to + 4; - err = cs_etm__synth_instruction_sample(etmq, &packet); + err = cs_etm__synth_instruction_sample(etmq); if (err) return err; } -- 2.7.4

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