CoreSight

coresight@lists.linaro.org

4 participants
2643 discussions

Preparing Yourself Before Choosing a Local Phone Repair Option

by tomoka2355＠gamintor.com

Searching for a phone repair shop near me can feel simple, but being prepared makes the experience smoother and more reliable. Before trusting any phone repair shop near me, it helps to understand your device issue, back up your data, and know your phone model. People often assume every phone repair shop near me offers the same expertise, but experience shows that preparation leads to better outcomes. Services like door2doormobilerepair highlight how informed users communicate problems more clearly. Taking a moment to research what a phone repair shop near me typically handles builds confidence, and door2doormobilerepair reflects how preparation supports trust when choosing a phone repair shop near me. Get More Info: https://door2doormobilerepair.com/smartphone-repair/

2 months, 1 week

Lumexa Skin Brightening Serum – Glow-Boosting Formula for Clear Skin

by tomoka2355＠gamintor.com

Lumexa Skin Brightening Serum is a lightweight, fast-absorbing formula designed to help enhance your skin’s natural glow and promote a more even-looking tone. Infused with carefully selected brightening and hydrating ingredients, it works to reduce the appearance of dullness while leaving skin feeling smooth, fresh, and radiant. With regular use, Lumexa helps your complexion look clearer, healthier, and visibly luminous without feeling heavy or greasy. Get More info: https://mazton.ae/collections/skin-care/products/lumexa-skin-brightening-se…

2 months, 1 week

Lumexa Skin Brightening Serum – Glow-Boosting Formula for Clear Skin

by tomoka2355＠gamintor.com

2 months, 1 week

[PATCH v4 0/3] Coresight TMC-ETR: refactor the tmc-etr mode and some cleanups

by Junhao He

This patchset builds upon Yicong's previous patches [1]. Patch 2 introducing fix race issues found by using TMC-ETR. Patch 1 & 3 introducing two cleanups found when debugging the issues. [1] https://lore.kernel.org/linux-arm-kernel/20241202092419.11777-1-yangyicong@… --- Changes in v4: - a) Add comment at the context of set etr to sysfs mode. - b) Move the check on drvdata->read to the start of enable etr. - c) Add checks to prevent multiple sysfs processes from simultaneously competing to enable ETR. - d) Fix the issue with the guard used. Link: https://lore.kernel.org/linux-arm-kernel/20250818080600.418425-1-hejunhao3@… --- Changes in v3: - Patches 1: Additional comment for tmc_drvdata::etr_mode. Update comment for tmc_drvdata::reading with Jonathan's Tag. - Patches 2: Replace scoped_guard with guard with Jonathan's Tag. - Patches 2: Fix spinlock to raw_spinlock, and refactor this code based on Leo's suggested solution. - Patches 3: change the size's type to ssize_t and use max_t to simplify the code with Leo's Tag. Link: https://lore.kernel.org/linux-arm-kernel/20250620075412.952934-1-hejunhao3@… Changes in v2: - Updated the commit of patch2. - Rebase to v6.16-rc1 Junhao He (1): coresight: tmc: refactor the tmc-etr mode setting to avoid race conditions Yicong Yang (2): coresight: tmc: Add missing doc including reading and etr_mode of struct tmc_drvdata coresight: tmc: Decouple the perf buffer allocation from sysfs mode .../hwtracing/coresight/coresight-tmc-etr.c | 136 +++++++++--------- drivers/hwtracing/coresight/coresight-tmc.h | 2 + 2 files changed, 66 insertions(+), 72 deletions(-) -- 2.33.0

2 months, 1 week

Re: [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register

by Suzuki K Poulose

On 23/12/2025 08:41, Jie Gan wrote: > From: Tao Zhang <tao.zhang(a)oss.qualcomm.com> > > The TPDA_SYNC counter tracks the number of bytes transferred from the > aggregator. When this count reaches the value programmed in the > TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace > tools to accurately parse each valid packet. > > Signed-off-by: Tao Zhang <tao.zhang(a)oss.qualcomm.com> > Reviewed-by: James Clark <james.clark(a)linaro.org> > Co-developed-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > --- > .../ABI/testing/sysfs-bus-coresight-devices-tpda | 18 +++++ > drivers/hwtracing/coresight/coresight-tpda.c | 90 ++++++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpda.h | 10 +++ > 3 files changed, 118 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > index c8bc7b19ab25..c989eea1ef59 100644 > --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > @@ -41,3 +41,21 @@ Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang <tao.zhang(a)oss.qu > Description: > (RW) Set global (all ports) flush request bit. The bit remains set until a > global flush request sequence completes. > + > +What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode > +Date: December 2025 > +KernelVersion: 6.19 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang <tao.zhang(a)oss.qualcomm.com>, Jie Gan <jie.gan(a)oss.qualcomm.com> > +Description: > + (RW) Set mode the of the syncr counter. > + mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests > + mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K > + data by writing a value 13 to the COUNT[11:7] field. > + > +What: /sys/bus/coresight/devices/<tpda-name>/syncr_count > +Date: December 2025 > +KernelVersion: 6.19 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang <tao.zhang(a)oss.qualcomm.com>, Jie Gan <jie.gan(a)oss.qualcomm.com> > +Description: > + (RW) Set value the of the syncr counter. > + Range: 0-4095 > diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c > index d24a9098f1b1..8283e16ec400 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.c > +++ b/drivers/hwtracing/coresight/coresight-tpda.c > @@ -163,6 +163,20 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) > */ > if (drvdata->trig_flag_ts) > writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); > + > + /* Initialize with a value of 0 */ > + val = 0; > + if (drvdata->syncr_mode) > + val |= TPDA_SYNCR_MODE_CTRL_MASK; > + > + if (drvdata->syncr_count > 0 && > + drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK) > + val |= drvdata->syncr_count; > + else > + /* Program the count to its MAX value by default */ > + val |= TPDA_SYNCR_COUNT_MASK; > + > + writel_relaxed(val, drvdata->base + TPDA_SYNCR); > } > > static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) > @@ -385,8 +399,84 @@ static ssize_t global_flush_req_store(struct device *dev, > } > static DEVICE_ATTR_RW(global_flush_req); > > +static ssize_t syncr_mode_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val, syncr_val; > + > + if (!drvdata->csdev->refcnt) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR); > + val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val); > + > + return sysfs_emit(buf, "%lu\n", val); > +} > + > +static ssize_t syncr_mode_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (kstrtoul(buf, 0, &val)) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + /* set the mode when first enabling the device */ > + drvdata->syncr_mode = !!val; > + > + return size; > +} > +static DEVICE_ATTR_RW(syncr_mode); > + > +static ssize_t syncr_count_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (!drvdata->csdev->refcnt) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + val = readl_relaxed(drvdata->base + TPDA_SYNCR); > + val &= TPDA_SYNCR_COUNT_MASK; > + > + return sysfs_emit(buf, "%lu\n", val); > +} > + > +static ssize_t syncr_count_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (kstrtoul(buf, 0, &val)) > + return -EINVAL; > + > + if (val < 0 || val > TPDA_SYNCR_COUNT_MASK) Checking "val < 0" for an unsigned type is invalid. Simply keep the second part. Suzuki > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + drvdata->syncr_count = val; > + > + return size; > +} > +static DEVICE_ATTR_RW(syncr_count); > + > static struct attribute *tpda_attrs[] = { > &dev_attr_global_flush_req.attr, > + &dev_attr_syncr_mode.attr, > + &dev_attr_syncr_count.attr, > tpda_trig_sysfs_rw(freq_ts_enable, FREQTS), > tpda_trig_sysfs_rw(trig_freq_enable, FRIE), > tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE), > diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h > index 1cc9253293ec..56d35697303a 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.h > +++ b/drivers/hwtracing/coresight/coresight-tpda.h > @@ -9,6 +9,7 @@ > #define TPDA_CR (0x000) > #define TPDA_Pn_CR(n) (0x004 + (n * 4)) > #define TPDA_FPID_CR (0x084) > +#define TPDA_SYNCR (0x08C) > > /* Cross trigger global (all ports) flush request bit */ > #define TPDA_CR_FLREQ BIT(0) > @@ -36,6 +37,11 @@ > /* Aggregator port DSB data set element size bit */ > #define TPDA_Pn_CR_DSBSIZE BIT(8) > > +/* TPDA_SYNCR count mask */ > +#define TPDA_SYNCR_COUNT_MASK GENMASK(11, 0) > +/* TPDA_SYNCR mode control bit */ > +#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12) > + > #define TPDA_MAX_INPORTS 32 > > /** > @@ -52,6 +58,8 @@ > * @trig_freq: Enable/disable cross trigger FREQ packet request interface. > * @freq_ts: Enable/disable the timestamp for all FREQ packets. > * @cmbchan_mode: Configure the CMB/MCMB channel mode. > + * @syncr_mode: Setting the mode for counting packets. > + * @syncr_count: Setting the value of the count. > */ > struct tpda_drvdata { > void __iomem *base; > @@ -66,6 +74,8 @@ struct tpda_drvdata { > bool trig_freq; > bool freq_ts; > bool cmbchan_mode; > + bool syncr_mode; > + u32 syncr_count; > }; > > /* Enumerate members of global control register(cr) */ >

2 months, 2 weeks

Re: [PATCH v6 4/4] coresight: tpda: add sysfs node to flush specific port

by Suzuki K Poulose

On 23/12/2025 02:16, Jie Gan wrote: > > > On 12/22/2025 9:12 PM, Suzuki K Poulose wrote: >> On 22/12/2025 06:02, Jie Gan wrote: >>> From: Tao Zhang <tao.zhang(a)oss.qualcomm.com> >>> >>> Setting bit i in the TPDA_FLUSH_CR register initiates a flush request >>> for port i, forcing the data to synchronize and be transmitted to the >>> sink device. >>> >>> Signed-off-by: Tao Zhang <tao.zhang(a)oss.qualcomm.com> >>> Reviewed-by: James Clark <james.clark(a)linaro.org> >>> Co-developed-by: Jie Gan <jie.gan(a)oss.qualcomm.com> >>> Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> >>> --- >>> .../ABI/testing/sysfs-bus-coresight-devices-tpda | 7 ++++ >>> drivers/hwtracing/coresight/coresight-tpda.c | 40 +++++++++++ >>> + ++++++++++ >>> drivers/hwtracing/coresight/coresight-tpda.h | 1 + >>> 3 files changed, 48 insertions(+) >>> >>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices- >>> tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >>> index d359d90dca72..df8f03d4b573 100644 >>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >>> @@ -51,3 +51,10 @@ Description: >>> mode 0 - COUNT[11:0] value represents the approximate >>> number of bytes moved between two ASYNC packet requests >>> mode 1 - the bits COUNT[11:7] are used as a power of 2. for >>> example, we could insert an async packet every 8K >>> data by writing a value 13 to the COUNT[11:7] field. >>> + >>> +What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req >>> +Date: December 2025 >>> +KernelVersion: 6.19 >>> +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang >>> <tao.zhang(a)oss.qualcomm.com>, Jie Gan <jie.gan(a)oss.qualcomm.com> >>> +Description: >>> + (RW) Configure the bit i to requests a flush operation of >>> port i on the TPDA. >> >> Does this have similar semantics as the "global_flush_req" for "Read" ? > > Yes, global_flush_req triggers all ports at once, whereas this node > initiates a flush request for specific port(s). > > For reading, we can check whether the flush request has completed. Please document it as such. Suzuki > > Thanks, > Jie > >> i.e., the bit stays set until the request completes ? Otherwise, why >> isn't this Write only ? >> >> I don't see the point of "Reading" this value back. >> >> Suzuki >> >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/ >>> hwtracing/coresight/coresight-tpda.c >>> index 7baa8a0965d3..f79fea4fbb2c 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.c >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c >>> @@ -430,9 +430,49 @@ static ssize_t syncr_mode_store(struct device *dev, >>> } >>> static DEVICE_ATTR_RW(syncr_mode); >>> +static ssize_t port_flush_req_show(struct device *dev, >>> + struct device_attribute *attr, >>> + char *buf) >>> +{ >>> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + unsigned long val; >>> + >>> + if (!drvdata->csdev->refcnt) >>> + return -EINVAL; >>> + >>> + guard(spinlock)(&drvdata->spinlock); >>> + val = readl_relaxed(drvdata->base + TPDA_FLUSH_CR); >>> + >>> + return sysfs_emit(buf, "0x%lx\n", val); >>> +} >>> + >>> +static ssize_t port_flush_req_store(struct device *dev, >>> + struct device_attribute *attr, >>> + const char *buf, >>> + size_t size) >>> +{ >>> + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + u32 val; >>> + >>> + if (kstrtou32(buf, 0, &val)) >>> + return -EINVAL; >>> + >>> + if (!drvdata->csdev->refcnt || !val) >>> + return -EINVAL; >>> + >>> + guard(spinlock)(&drvdata->spinlock); >>> + CS_UNLOCK(drvdata->base); >>> + writel_relaxed(val, drvdata->base + TPDA_FLUSH_CR); >>> + CS_LOCK(drvdata->base); >>> + >>> + return size; >>> +} >>> +static DEVICE_ATTR_RW(port_flush_req); >>> + >>> static struct attribute *tpda_attrs[] = { >>> &dev_attr_global_flush_req.attr, >>> &dev_attr_syncr_mode.attr, >>> + &dev_attr_port_flush_req.attr, >>> tpda_trig_sysfs_rw(freq_ts_enable, FREQTS), >>> tpda_trig_sysfs_rw(trig_freq_enable, FRIE), >>> tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE), >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/ >>> hwtracing/coresight/coresight-tpda.h >>> index 1d2de50bb9f9..ef1ce2ce36a9 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.h >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.h >>> @@ -10,6 +10,7 @@ >>> #define TPDA_Pn_CR(n) (0x004 + (n * 4)) >>> #define TPDA_FPID_CR (0x084) >>> #define TPDA_SYNCR (0x08C) >>> +#define TPDA_FLUSH_CR (0x090) >>> /* Cross trigger global (all ports) flush request bit */ >>> #define TPDA_CR_FLREQ BIT(0) >>> >> >

2 months, 2 weeks

Re: [PATCH v6 4/4] coresight: tpda: add sysfs node to flush specific port

by Suzuki K Poulose

On 22/12/2025 06:02, Jie Gan wrote: > From: Tao Zhang <tao.zhang(a)oss.qualcomm.com> > > Setting bit i in the TPDA_FLUSH_CR register initiates a flush request > for port i, forcing the data to synchronize and be transmitted to the > sink device. > > Signed-off-by: Tao Zhang <tao.zhang(a)oss.qualcomm.com> > Reviewed-by: James Clark <james.clark(a)linaro.org> > Co-developed-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > --- > .../ABI/testing/sysfs-bus-coresight-devices-tpda | 7 ++++ > drivers/hwtracing/coresight/coresight-tpda.c | 40 ++++++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpda.h | 1 + > 3 files changed, 48 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > index d359d90dca72..df8f03d4b573 100644 > --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > @@ -51,3 +51,10 @@ Description: > mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests > mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K > data by writing a value 13 to the COUNT[11:7] field. > + > +What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req > +Date: December 2025 > +KernelVersion: 6.19 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang <tao.zhang(a)oss.qualcomm.com>, Jie Gan <jie.gan(a)oss.qualcomm.com> > +Description: > + (RW) Configure the bit i to requests a flush operation of port i on the TPDA. Does this have similar semantics as the "global_flush_req" for "Read" ? i.e., the bit stays set until the request completes ? Otherwise, why isn't this Write only ? I don't see the point of "Reading" this value back. Suzuki > diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c > index 7baa8a0965d3..f79fea4fbb2c 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.c > +++ b/drivers/hwtracing/coresight/coresight-tpda.c > @@ -430,9 +430,49 @@ static ssize_t syncr_mode_store(struct device *dev, > } > static DEVICE_ATTR_RW(syncr_mode); > > +static ssize_t port_flush_req_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (!drvdata->csdev->refcnt) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + val = readl_relaxed(drvdata->base + TPDA_FLUSH_CR); > + > + return sysfs_emit(buf, "0x%lx\n", val); > +} > + > +static ssize_t port_flush_req_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + u32 val; > + > + if (kstrtou32(buf, 0, &val)) > + return -EINVAL; > + > + if (!drvdata->csdev->refcnt || !val) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + CS_UNLOCK(drvdata->base); > + writel_relaxed(val, drvdata->base + TPDA_FLUSH_CR); > + CS_LOCK(drvdata->base); > + > + return size; > +} > +static DEVICE_ATTR_RW(port_flush_req); > + > static struct attribute *tpda_attrs[] = { > &dev_attr_global_flush_req.attr, > &dev_attr_syncr_mode.attr, > + &dev_attr_port_flush_req.attr, > tpda_trig_sysfs_rw(freq_ts_enable, FREQTS), > tpda_trig_sysfs_rw(trig_freq_enable, FRIE), > tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE), > diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h > index 1d2de50bb9f9..ef1ce2ce36a9 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.h > +++ b/drivers/hwtracing/coresight/coresight-tpda.h > @@ -10,6 +10,7 @@ > #define TPDA_Pn_CR(n) (0x004 + (n * 4)) > #define TPDA_FPID_CR (0x084) > #define TPDA_SYNCR (0x08C) > +#define TPDA_FLUSH_CR (0x090) > > /* Cross trigger global (all ports) flush request bit */ > #define TPDA_CR_FLREQ BIT(0) >

2 months, 2 weeks

Re: [PATCH v6 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register

by Suzuki K Poulose

On 22/12/2025 06:02, Jie Gan wrote: > From: Tao Zhang <tao.zhang(a)oss.qualcomm.com> > > The TPDA_SYNC counter tracks the number of bytes transferred from the > aggregator. When this count reaches the value programmed in the > TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace > tools to accurately parse each valid packet. > > Signed-off-by: Tao Zhang <tao.zhang(a)oss.qualcomm.com> > Reviewed-by: James Clark <james.clark(a)linaro.org> > Co-developed-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > --- > .../ABI/testing/sysfs-bus-coresight-devices-tpda | 10 +++++ > drivers/hwtracing/coresight/coresight-tpda.c | 46 ++++++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpda.h | 8 ++++ > 3 files changed, 64 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > index c8bc7b19ab25..d359d90dca72 100644 > --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > @@ -41,3 +41,13 @@ Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang <tao.zhang(a)oss.qu > Description: > (RW) Set global (all ports) flush request bit. The bit remains set until a > global flush request sequence completes. > + > +What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode > +Date: December 2025 > +KernelVersion: 6.19 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Tao Zhang <tao.zhang(a)oss.qualcomm.com>, Jie Gan <jie.gan(a)oss.qualcomm.com> > +Description: > + (RW) Set mode the of the syncr counter. > + mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests > + mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K > + data by writing a value 13 to the COUNT[11:7] field. What is COUNT here ? and more importantly how is this usefule without the support for setting the COUNT ? Do we plan to expose setting this ? If yes, why not now ? I don't see the point of merging "this" patch without the support for setting the counter. Suzuki > diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c > index d24a9098f1b1..7baa8a0965d3 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.c > +++ b/drivers/hwtracing/coresight/coresight-tpda.c > @@ -163,6 +163,15 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) > */ > if (drvdata->trig_flag_ts) > writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); > + > + /* Initialize with a value of 0 */ > + val = 0; > + if (drvdata->syncr_mode) > + val |= TPDA_SYNCR_MODE_CTRL_MASK; > + > + /* Program the counter to its MAX value by default */ > + val |= TPDA_SYNCR_COUNTER_MASK; > + writel_relaxed(val, drvdata->base + TPDA_SYNCR); > } > > static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) > @@ -385,8 +394,45 @@ static ssize_t global_flush_req_store(struct device *dev, > } > static DEVICE_ATTR_RW(global_flush_req); > > +static ssize_t syncr_mode_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val, syncr_val; > + > + if (!drvdata->csdev->refcnt) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR); > + val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val); > + > + return sysfs_emit(buf, "%lu\n", val); > +} > + > +static ssize_t syncr_mode_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (kstrtoul(buf, 0, &val)) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + /* set the mode when first enabling the device */ > + drvdata->syncr_mode = !!val; > + > + return size; > +} > +static DEVICE_ATTR_RW(syncr_mode); > + > static struct attribute *tpda_attrs[] = { > &dev_attr_global_flush_req.attr, > + &dev_attr_syncr_mode.attr, > tpda_trig_sysfs_rw(freq_ts_enable, FREQTS), > tpda_trig_sysfs_rw(trig_freq_enable, FRIE), > tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE), > diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h > index 1cc9253293ec..1d2de50bb9f9 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.h > +++ b/drivers/hwtracing/coresight/coresight-tpda.h > @@ -9,6 +9,7 @@ > #define TPDA_CR (0x000) > #define TPDA_Pn_CR(n) (0x004 + (n * 4)) > #define TPDA_FPID_CR (0x084) > +#define TPDA_SYNCR (0x08C) > > /* Cross trigger global (all ports) flush request bit */ > #define TPDA_CR_FLREQ BIT(0) > @@ -36,6 +37,11 @@ > /* Aggregator port DSB data set element size bit */ > #define TPDA_Pn_CR_DSBSIZE BIT(8) > > +/* TPDA_SYNCR counter mask */ > +#define TPDA_SYNCR_COUNTER_MASK GENMASK(11, 0) > +/* TPDA_SYNCR mode control bit */ > +#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12) > + > #define TPDA_MAX_INPORTS 32 > > /** > @@ -52,6 +58,7 @@ > * @trig_freq: Enable/disable cross trigger FREQ packet request interface. > * @freq_ts: Enable/disable the timestamp for all FREQ packets. > * @cmbchan_mode: Configure the CMB/MCMB channel mode. > + * @syncr_mode: Configure the mode for counting packets. > */ > struct tpda_drvdata { > void __iomem *base; > @@ -66,6 +73,7 @@ struct tpda_drvdata { > bool trig_freq; > bool freq_ts; > bool cmbchan_mode; > + bool syncr_mode; > }; > > /* Enumerate members of global control register(cr) */ >

2 months, 2 weeks

Re: (subset) [PATCH v4 0/2] Enable CTCU device for QCS8300

by Suzuki K Poulose

On Mon, 03 Nov 2025 15:06:20 +0800, Jie Gan wrote: > Enable CTCU device for QCS8300 platform. Add a fallback mechnasim in binding to utilize > the compitable of the SA8775p platform becuase the CTCU for QCS8300 shares same > configurations as SA8775p platform. > > Changes in V4: > 1. dtsi file has been renamed from qcs8300.dtsi -> monaco.dtsi > Link to V3 - https://lore.kernel.org/all/20251013-enable-ctcu-for-qcs8300-v3-0-611e6e0d3… > > [...] Applied, thanks! [1/2] dt-bindings: arm: add CTCU device for monaco https://git.kernel.org/coresight/c/51cd1fb70e08 Best regards, -- Suzuki K Poulose <suzuki.poulose(a)arm.com>

2 months, 2 weeks

Re: [PATCH v2 RESEND] coresight: etm-perf: Fix reference count leak in etm_setup_aux

by Leo Yan

Hi, On Fri, Dec 19, 2025 at 10:39:49AM +0800, Ma Ke wrote: [...] > From the discussion, I note two possible fix directions: > > 1. Release the initial reference in etm_setup_aux() (current v2 patch) > 2. Modify the behavior of coresight_get_sink_by_id() itself so it > doesn't increase the reference count. The option 2 is the right way to go. > To ensure the correctness of the v3 patch, I'd like to confirm which > patch is preferred. If option 2 is the consensus, I'm happy to modify > the implementation of coresight_get_sink_by_id() as suggested. It is good to use a separate patch to fix coresight_find_device_by_fwnode() mentioned by James: diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c index 0db64c5f4995..2b34f818ba88 100644 --- a/drivers/hwtracing/coresight/coresight-platform.c +++ b/drivers/hwtracing/coresight/coresight-platform.c @@ -107,14 +107,16 @@ coresight_find_device_by_fwnode(struct fwnode_handle *fwnode) * platform bus. */ dev = bus_find_device_by_fwnode(&platform_bus_type, fwnode); - if (dev) - return dev; /* * We have a configurable component - circle through the AMBA bus * looking for the device that matches the endpoint node. */ - return bus_find_device_by_fwnode(&amba_bustype, fwnode); + if (!dev) + dev = bus_find_device_by_fwnode(&amba_bustype, fwnode); + + put_device(dev); + return dev; } /* @@ -274,7 +276,6 @@ static int of_coresight_parse_endpoint(struct device *dev, of_node_put(rparent); of_node_put(rep); - put_device(rdev); return ret; } Thanks for working on this.

2 months, 2 weeks

← Newer
1
2
3
4
5
6
7
8
9
...
265
Older →

Jump to page:

2026

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

CoreSight