CoreSight August 2025

coresight@lists.linaro.org

7 participants
42 discussions

Re: [PATCH v4 01/10] coresight: core: Refactoring ctcu_get_active_port and make it generic

by Mike Leach

On Fri, 25 Jul 2025 at 11:08, Jie Gan <jie.gan(a)oss.qualcomm.com> wrote: > > Remove ctcu_get_active_port from CTCU module and add it to the core > framework. > > The port number is crucial for the CTCU device to identify which ETR > it serves. With the port number we can correctly get required parameters > of the CTCU device in TMC module. > > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > --- > drivers/hwtracing/coresight/coresight-core.c | 24 +++++++++++++++++++ > .../hwtracing/coresight/coresight-ctcu-core.c | 19 +-------------- > drivers/hwtracing/coresight/coresight-priv.h | 2 ++ > 3 files changed, 27 insertions(+), 18 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 1accd7cbd54b..042c4fa39e55 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -580,6 +580,30 @@ struct coresight_device *coresight_get_sink(struct coresight_path *path) > } > EXPORT_SYMBOL_GPL(coresight_get_sink); > > +/** > + * coresight_get_in_port_dest: get the in-port number of the dest device > + * that is connected to the src device. > + * > + * @src: csdev of the source device. > + * @dest: csdev of the destination device. > + * > + * Return: port number upon success or -EINVAL for fail. > + */ > +int coresight_get_in_port_dest(struct coresight_device *src, > + struct coresight_device *dest) > +{ > + struct coresight_platform_data *pdata = dest->pdata; > + int i; > + > + for (i = 0; i < pdata->nr_inconns; ++i) { > + if (pdata->in_conns[i]->src_dev == src) > + return pdata->in_conns[i]->dest_port; > + } > + > + return -EINVAL; > +} > +EXPORT_SYMBOL_GPL(coresight_get_in_port_dest); > + > u32 coresight_get_sink_id(struct coresight_device *csdev) > { > if (!csdev->ea) > diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hwtracing/coresight/coresight-ctcu-core.c > index c6bafc96db96..3bdedf041390 100644 > --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c > +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c > @@ -118,23 +118,6 @@ static int __ctcu_set_etr_traceid(struct coresight_device *csdev, u8 traceid, in > return 0; > } > > -/* > - * Searching the sink device from helper's view in case there are multiple helper devices > - * connected to the sink device. > - */ > -static int ctcu_get_active_port(struct coresight_device *sink, struct coresight_device *helper) > -{ > - struct coresight_platform_data *pdata = helper->pdata; > - int i; > - > - for (i = 0; i < pdata->nr_inconns; ++i) { > - if (pdata->in_conns[i]->src_dev == sink) > - return pdata->in_conns[i]->dest_port; > - } > - > - return -EINVAL; > -} > - > static int ctcu_set_etr_traceid(struct coresight_device *csdev, struct coresight_path *path, > bool enable) > { > @@ -147,7 +130,7 @@ static int ctcu_set_etr_traceid(struct coresight_device *csdev, struct coresight > return -EINVAL; > } > > - port_num = ctcu_get_active_port(sink, csdev); > + port_num = coresight_get_in_port_dest(sink, csdev); > if (port_num < 0) > return -EINVAL; > > diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h > index 33e22b1ba043..e51b22b8ebde 100644 > --- a/drivers/hwtracing/coresight/coresight-priv.h > +++ b/drivers/hwtracing/coresight/coresight-priv.h > @@ -156,6 +156,8 @@ void coresight_remove_links(struct coresight_device *orig, > u32 coresight_get_sink_id(struct coresight_device *csdev); > void coresight_path_assign_trace_id(struct coresight_path *path, > enum cs_mode mode); > +int coresight_get_in_port_dest(struct coresight_device *src, > + struct coresight_device *dest); > > #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X) > int etm_readl_cp14(u32 off, unsigned int *val); > -- > 2.34.1 > Reviewed by: Mike Leach <mike.leach(a)linaro.org> -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

1 month, 1 week

Re: [PATCH v2 0/2] Enable CTCU device for QCS8300

by Mike Leach

Hi Jie, On Tue, 5 Aug 2025 at 05:11, Jie Gan <jie.gan(a)oss.qualcomm.com> wrote: > > > > On 7/28/2025 9:08 AM, Jie Gan wrote: > > > > > > On 7/15/2025 8:41 AM, Jie Gan wrote: > >> > >> > >> On 6/24/2025 5:59 PM, Jie Gan wrote: > >>> Enable CTCU device for QCS8300 platform. Add a fallback mechnasim in > >>> binding to utilize > >>> the compitable of the SA8775p platform becuase the CTCU for QCS8300 > >>> shares same > >>> configurations as SA8775p platform. > >> > >> Gentle ping. > > > > Gentle ping. > > Gentle ping. > Hi Coresight maintainers, > > Can you please help to review the patch? > > Thanks, > Jie > > > > > Thanks, > > Jie > > > >> > >> Hi Suzuki, Mike, James, Rob > >> > >> Can you plz help to review the patch from Coresight view? > >> > >> Thanks, > >> Jie > >> > >>> > >>> Changes in V2: > >>> 1. Add Krzysztof's R-B tag for dt-binding patch. > >>> 2. Add Konrad's Acked-by tag for dt patch. > >>> 3. Rebased on tag next-20250623. > >>> 4. Missed email addresses for coresight's maintainers in V1, loop them. > >>> Link to V1 - https://lore.kernel.org/all/20250327024943.3502313-1- > >>> jie.gan(a)oss.qualcomm.com/ > >>> > >>> Jie Gan (2): > >>> dt-bindings: arm: add CTCU device for QCS8300 > >>> arm64: dts: qcom: qcs8300: Add CTCU and ETR nodes > >>> > >>> .../bindings/arm/qcom,coresight-ctcu.yaml | 9 +- > >>> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 153 ++++++++++++++++++ > >>> 2 files changed, 160 insertions(+), 2 deletions(-) > >>> > >> > >> > > > You need to send a new patch addressing the comments made by Krzysztof.. Regards Mike -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

1 month, 1 week

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