This patch seris adds support for sample flags so can facilitate perf to print sample flags for branch instruction.
The branch instructions also include exception taken and return related instructions, so the first patch is used to generate branch sample for exception packets; and the second patch is to track the exception number.
The patch 0003 is to set branch instruction flags in packet, this patch has the core code in this series to set flags according to the decoding element type, and also based on the elements including instruction type, subtype and condition flag to help making decision to set flags value.
The patch 0004 is to support sample flags by copying the flags value from packet structure to sample structure, and it includes two fixing up for TRACE_ON and exception packets.
The patch series is based on OpenCSD v0.10.0 and Rob's patch 'perf: Support for Arm A32/T32 instruction sets in CoreSight trace' also is prerequisite to support A32/T32 ISAs.
The patches can be applied on the acme core branch [1] and tested on Juno board with below commands for A64 and A32/T32 building:
# perf script -F,-time,+flags,+ip,+sym,+addr -k vmlinux
Leo Yan (4): perf cs-etm: Generate branch sample for exception packet perf cs-etm: Track exception number perf cs-etm: Set branch instruction flags in packet perf cs-etm: Add support sample flags
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 237 +++++++++++++++++++++++- tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 11 +- tools/perf/util/cs-etm.c | 44 ++++- 3 files changed, 277 insertions(+), 15 deletions(-)
The exception packet appears as one element with 'elem_type' == OCSD_GEN_TRC_ELEM_EXCEPTION or OCSD_GEN_TRC_ELEM_EXCEPTION_RET, which present for exception entry and exit respectively. The decoder set packet fields 'packet->exc' and 'packet->exc_ret' to indicate the exception packets; but exception packets don't have dedicated sample type and shares the same sample type CS_ETM_RANGE with normal instruction packets.
As result, the exception packets are taken as normal instruction packets and this introduces confusion to mix different packet types. Furthermore, these instruction range packets will be processed for branch sample only when 'packet->last_instr_taken_branch' is true, otherwise they will be omitted, this can introduce mess for exception and exception returning due we don't have complete address range info for context switching.
To process exception packets properly, this patch introduce two new sample type: CS_ETM_EXCEPTION and CS_ETM_EXCEPTION_RET; for these two kind packets, they will be handled by cs_etm__exception(). The func cs_etm__exception() forces to set previous CS_ETM_RANGE packet flag 'prev_packet->last_instr_taken_branch' to true, this matches well with the program flow when the exception is trapped from user space to kernel space, no matter if the most recent flow has branch taken or not; this is also safe for returning to user space after exception handling.
After exception packets have their own sample type, the packet fields 'packet->exc' and 'packet->exc_ret' aren't needed anymore, so remove them.
Signed-off-by: Leo Yan leo.yan@linaro.org --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 26 +++++++++++++++++------ tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 10 ++++----- tools/perf/util/cs-etm.c | 28 +++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 11 deletions(-)
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c index 5efb616..0f29534 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -269,8 +269,6 @@ static void cs_etm_decoder__clear_buffer(struct cs_etm_decoder *decoder) decoder->packet_buffer[i].instr_count = 0; decoder->packet_buffer[i].last_instr_taken_branch = false; decoder->packet_buffer[i].last_instr_size = 0; - decoder->packet_buffer[i].exc = false; - decoder->packet_buffer[i].exc_ret = false; decoder->packet_buffer[i].cpu = INT_MIN; } } @@ -298,8 +296,6 @@ cs_etm_decoder__buffer_packet(struct cs_etm_decoder *decoder,
decoder->packet_buffer[et].sample_type = sample_type; decoder->packet_buffer[et].isa = CS_ETM_ISA_UNKNOWN; - decoder->packet_buffer[et].exc = false; - decoder->packet_buffer[et].exc_ret = false; decoder->packet_buffer[et].cpu = *((int *)inode->priv); decoder->packet_buffer[et].start_addr = CS_ETM_INVAL_ADDR; decoder->packet_buffer[et].end_addr = CS_ETM_INVAL_ADDR; @@ -376,6 +372,22 @@ cs_etm_decoder__buffer_trace_on(struct cs_etm_decoder *decoder, CS_ETM_TRACE_ON); }
+static ocsd_datapath_resp_t +cs_etm_decoder__buffer_exception(struct cs_etm_decoder *decoder, + const uint8_t trace_chan_id) +{ + return cs_etm_decoder__buffer_packet(decoder, trace_chan_id, + CS_ETM_EXCEPTION); +} + +static ocsd_datapath_resp_t +cs_etm_decoder__buffer_exception_ret(struct cs_etm_decoder *decoder, + const uint8_t trace_chan_id) +{ + return cs_etm_decoder__buffer_packet(decoder, trace_chan_id, + CS_ETM_EXCEPTION_RET); +} + static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer( const void *context, const ocsd_trc_index_t indx __maybe_unused, @@ -401,10 +413,12 @@ static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer( trace_chan_id); break; case OCSD_GEN_TRC_ELEM_EXCEPTION: - decoder->packet_buffer[decoder->tail].exc = true; + resp = cs_etm_decoder__buffer_exception(decoder, + trace_chan_id); break; case OCSD_GEN_TRC_ELEM_EXCEPTION_RET: - decoder->packet_buffer[decoder->tail].exc_ret = true; + resp = cs_etm_decoder__buffer_exception_ret(decoder, + trace_chan_id); break; case OCSD_GEN_TRC_ELEM_PE_CONTEXT: case OCSD_GEN_TRC_ELEM_EO_TRACE: diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h index 9351bd1..217bcc6 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h @@ -23,9 +23,11 @@ struct cs_etm_buffer { };
enum cs_etm_sample_type { - CS_ETM_EMPTY = 0, - CS_ETM_RANGE = 1 << 0, - CS_ETM_TRACE_ON = 1 << 1, + CS_ETM_EMPTY = 0, + CS_ETM_RANGE = 1 << 0, + CS_ETM_TRACE_ON = 1 << 1, + CS_ETM_EXCEPTION = 1 << 2, + CS_ETM_EXCEPTION_RET = 1 << 3, };
enum cs_etm_isa { @@ -43,8 +45,6 @@ struct cs_etm_packet { u32 instr_count; u8 last_instr_taken_branch; u8 last_instr_size; - u8 exc; - u8 exc_ret; int cpu; };
diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 908bf9f..00a95d7 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -933,6 +933,25 @@ static int cs_etm__sample(struct cs_etm_queue *etmq) return 0; }
+static int cs_etm__exception(struct cs_etm_queue *etmq) +{ + /* + * When the exception packet is inserted, whether the last instruction + * in previous range packet is taken branch or not, we need to force + * to set 'prev_packet->last_instr_taken_branch' to true. This ensures + * to generate branch sample for the instruction range before the + * exception is trapped to kernel or before the exception returning. + * + * The exception packet includes the dummy address values, so don't + * swap PACKET with PREV_PACKET. This keeps PREV_PACKET to be useful + * for generating instruction and branch samples. + */ + if (etmq->prev_packet->sample_type == CS_ETM_RANGE) + etmq->prev_packet->last_instr_taken_branch = true; + + return 0; +} + static int cs_etm__flush(struct cs_etm_queue *etmq) { int err = 0; @@ -1048,6 +1067,15 @@ static int cs_etm__run_decoder(struct cs_etm_queue *etmq) */ cs_etm__sample(etmq); break; + case CS_ETM_EXCEPTION: + case CS_ETM_EXCEPTION_RET: + /* + * If the exception packet is coming, + * make sure the previous instruction + * range packet to be handled properly. + */ + cs_etm__exception(etmq); + break; case CS_ETM_TRACE_ON: /* * Discontinuity in trace, flush
When an exception packet comes, it contains the info for exception number; the exception number indicates the exception types, so from it we can know if the exception is taken for interrupt, system call or other traps, etc. But because the exception return packet cannot delivery exception number correctly by decoder thus when prepare sample flags we cannot know what's type for exception return.
This patch adds a new 'exc_num' array in decoder structure to record exception number per CPU, the exception number is recorded in the array when the exception packet comes and this exception number can be used by exception return packet. If detect there have discontinuous trace with TRACE_ON packet, the exception number is set to invalid value.
Signed-off-by: Leo Yan leo.yan@linaro.org --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 51 ++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c index 0f29534..efc4332 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -43,6 +43,7 @@ struct cs_etm_decoder { u32 packet_count; u32 head; u32 tail; + u32 *exc_num; struct cs_etm_packet packet_buffer[MAX_BUFFER]; };
@@ -368,16 +369,44 @@ static ocsd_datapath_resp_t cs_etm_decoder__buffer_trace_on(struct cs_etm_decoder *decoder, const uint8_t trace_chan_id) { - return cs_etm_decoder__buffer_packet(decoder, trace_chan_id, - CS_ETM_TRACE_ON); + int ret; + struct cs_etm_packet *packet; + + ret = cs_etm_decoder__buffer_packet(decoder, trace_chan_id, + CS_ETM_TRACE_ON); + if (ret != OCSD_RESP_CONT && ret != OCSD_RESP_WAIT) + return ret; + + packet = &decoder->packet_buffer[decoder->tail]; + + /* Clear execption number for discontinuous trace */ + decoder->exc_num[packet->cpu] = UINT32_MAX; + + return ret; }
static ocsd_datapath_resp_t cs_etm_decoder__buffer_exception(struct cs_etm_decoder *decoder, + const ocsd_generic_trace_elem *elem, const uint8_t trace_chan_id) { - return cs_etm_decoder__buffer_packet(decoder, trace_chan_id, - CS_ETM_EXCEPTION); + int ret; + struct cs_etm_packet *packet; + + ret = cs_etm_decoder__buffer_packet(decoder, trace_chan_id, + CS_ETM_EXCEPTION); + if (ret != OCSD_RESP_CONT && ret != OCSD_RESP_WAIT) + return ret; + + packet = &decoder->packet_buffer[decoder->tail]; + + /* + * Exception number is recorded per CPU and later can be used + * for exception return instruction analysis. + */ + decoder->exc_num[packet->cpu] = elem->exception_number; + + return ret; }
static ocsd_datapath_resp_t @@ -413,7 +442,7 @@ static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer( trace_chan_id); break; case OCSD_GEN_TRC_ELEM_EXCEPTION: - resp = cs_etm_decoder__buffer_exception(decoder, + resp = cs_etm_decoder__buffer_exception(decoder, elem, trace_chan_id); break; case OCSD_GEN_TRC_ELEM_EXCEPTION_RET: @@ -501,6 +530,10 @@ cs_etm_decoder__new(int num_cpu, struct cs_etm_decoder_params *d_params, if (!decoder) return NULL;
+ decoder->exc_num = zalloc(sizeof(*decoder->exc_num) * num_cpu); + if (!decoder->exc_num) + goto err_free_decoder; + decoder->data = d_params->data; decoder->prev_return = OCSD_RESP_CONT; cs_etm_decoder__clear_buffer(decoder); @@ -521,7 +554,7 @@ cs_etm_decoder__new(int num_cpu, struct cs_etm_decoder_params *d_params, decoder->dcd_tree = ocsd_create_dcd_tree(format, flags);
if (decoder->dcd_tree == 0) - goto err_free_decoder; + goto err_free_decoder_exc_num;
/* init library print logging support */ ret = cs_etm_decoder__init_def_logger_printing(d_params, decoder); @@ -532,6 +565,9 @@ cs_etm_decoder__new(int num_cpu, struct cs_etm_decoder_params *d_params, cs_etm_decoder__init_raw_frame_logging(d_params, decoder);
for (i = 0; i < num_cpu; i++) { + /* init expcetion number to an invalid value */ + decoder->exc_num[i] = UINT32_MAX; + ret = cs_etm_decoder__create_etm_decoder(d_params, &t_params[i], decoder); @@ -543,6 +579,8 @@ cs_etm_decoder__new(int num_cpu, struct cs_etm_decoder_params *d_params,
err_free_decoder_tree: ocsd_destroy_dcd_tree(decoder->dcd_tree); +err_free_decoder_exc_num: + free(decoder->exc_num); err_free_decoder: free(decoder); return NULL; @@ -603,5 +641,6 @@ void cs_etm_decoder__free(struct cs_etm_decoder *decoder)
ocsd_destroy_dcd_tree(decoder->dcd_tree); decoder->dcd_tree = NULL; + free(decoder->exc_num); free(decoder); }
The perf sample data contains flags to indicate the hardware trace data is belonging to which type branch instruction, thus this can be used to print out the human readable string. Arm CoreSight ETM sample data is missed to set flags and it is always set to zeros, this results in perf tool skips to print string for instruction types.
Arm CoreSight ETM supports different kinds instruction of A64, A32 and T32; this patch is to set branch instruction flags in packet for these ISAs.
The brief idea for patch implementation is describe as below:
- For element with OCSD_GEN_TRC_ELEM_TRACE_ON type, it is taken as trace beginning packet; for element with OCSD_GEN_TRC_ELEM_NO_SYNC or OCSD_GEN_TRC_ELEM_EO_TRACE, these two kinds elements are used to set for trace end;
As Mike suggested the packet stream might have more than one two TRACE_ON packets, the first one TRACE_ON packet indicates trace end and the second one is taken as trace restarting. We will handle this special case in the upper layer with packet queue handling, which has more context so it's more suitable fix up for it. This will be accomplished in the sequential patch.
- For instruction range packet, mainly base on three factors to decide the branch instruction types:
elem->last_i_type elem->last_i_subtype elem->last_instr_cond
If the instruction is immediate branch but without link and return flag, we consider it as function internal branch; in fact the immediate branch also can be used to invoke the function entry, usually this is only used in assembly code to directly call a symbol and don't expect to return back; after reviewing kernel normal functions and user space programs, both of them are very seldom to use immediate branch for function call. On the other hand, if we want to decide the immediate branch is for function branch jumping or for function calling, we need to rely on the start address of next packet and check the symbol offset for the start address, this will introduce much complexity in the implementation. So for this version we simply consider immediate branch as function internal branch. Moreover, we rely on 'elem->last_instr_cond' to decide if the branch instruction is a conditional branch or not.
If the instruction is immediate branch with link, it's instruction 'BL' and which is used for function call.
If the instruction is indirect branch and with subtype OCSD_S_INSTR_V7_IMPLIED_RET, the decoders gives the hint the function return for below cases related with A32/T32 instruction; set this branch flag as function return (Thanks for Al's suggestion).
BX R14 MOV PC, LR POP {…, PC} LDR PC, [SP], #offset
If the instruction is indirect branch without link, this is corresponding to instruction 'BR', this instruction usually is used for dynamic link lib with below usage; so we think it's a return instruction.
0000000000000680 <.plt>: 680: a9bf7bf0 stp x16, x30, [sp, #-16]! 684: 90000090 adrp x16, 10000 <__FRAME_END__+0xf630> 688: f947fe11 ldr x17, [x16, #4088] 68c: 913fe210 add x16, x16, #0xff8 690: d61f0220 br x17
If the instruction is indirect branch with link, e.g BLR, we think it's a function call.
For function return, ARMv8 introduces a dedicated instruction 'ret', which has flag of OCSD_S_INSTR_V8_RET.
- For exception packets, this patch divides into three types:
The first type of exception is caused by external logics like bus, interrupt controller, debug module or PE reset or halt; this is corresponding to flags "bcyi" which defined in doc perf-script.txt;
The second type is for system call, this is set as "bcs" by following definition in the doc;
The third type is for CPU trap, data and instruction prefetch abort, alignment abort; usually these exceptions are synchronous for CPU, so set them as "bci" type.
Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Mike Leach mike.leach@linaro.org Cc: Robert Walker robert.walker@arm.com Cc: Al Grant Al.Grant@arm.com Cc: Andi Kleen andi@firstfloor.org Cc: Adrian Hunter adrian.hunter@intel.com Cc: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Leo Yan leo.yan@linaro.org --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 168 ++++++++++++++++++++++++ tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 1 + 2 files changed, 169 insertions(+)
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c index efc4332..cbfd730 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -303,6 +303,7 @@ cs_etm_decoder__buffer_packet(struct cs_etm_decoder *decoder, decoder->packet_buffer[et].instr_count = 0; decoder->packet_buffer[et].last_instr_taken_branch = false; decoder->packet_buffer[et].last_instr_size = 0; + decoder->packet_buffer[et].flags = 0;
if (decoder->packet_count == MAX_BUFFER - 1) return OCSD_RESP_WAIT; @@ -417,6 +418,171 @@ cs_etm_decoder__buffer_exception_ret(struct cs_etm_decoder *decoder, CS_ETM_EXCEPTION_RET); }
+static void cs_etm_decoder__set_sample_flags( + const void *context, + const ocsd_generic_trace_elem *elem) +{ + struct cs_etm_decoder *decoder = (struct cs_etm_decoder *) context; + struct cs_etm_packet *packet; + u32 exc_num; + + packet = &decoder->packet_buffer[decoder->tail]; + + switch (elem->elem_type) { + case OCSD_GEN_TRC_ELEM_TRACE_ON: + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_TRACE_BEGIN; + break; + + case OCSD_GEN_TRC_ELEM_NO_SYNC: + case OCSD_GEN_TRC_ELEM_EO_TRACE: + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_TRACE_END; + break; + + case OCSD_GEN_TRC_ELEM_INSTR_RANGE: + /* + * Immediate branch instruction without neither link nor + * return flag, it's normal branch instruction within + * the function. + */ + if (elem->last_i_type == OCSD_INSTR_BR && + elem->last_i_subtype == OCSD_S_INSTR_NONE) { + packet->flags = PERF_IP_FLAG_BRANCH; + + if (elem->last_instr_cond) + packet->flags |= PERF_IP_FLAG_CONDITIONAL; + } + + /* + * Immediate branch instruction with link (e.g. BL), this is + * branch instruction for function call. + */ + if (elem->last_i_type == OCSD_INSTR_BR && + elem->last_i_subtype == OCSD_S_INSTR_BR_LINK) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_CALL; + + /* + * Indirect branch instruction with subtype of + * OCSD_S_INSTR_V7_IMPLIED_RET, this is explicit hint for + * function return for A32/T32. + */ + if (elem->last_i_type == OCSD_INSTR_BR_INDIRECT && + elem->last_i_subtype == OCSD_S_INSTR_V7_IMPLIED_RET) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_RETURN; + + /* + * Indirect branch instruction without link (e.g. BR), usually + * this is used for function return, especially for functions + * within dynamic link lib. + */ + if (elem->last_i_type == OCSD_INSTR_BR_INDIRECT && + elem->last_i_subtype == OCSD_S_INSTR_NONE) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_RETURN; + + /* + * Indirect branch instruction with link (e.g. BLR), this is + * branch instruction for function call. + */ + if (elem->last_i_type == OCSD_INSTR_BR_INDIRECT && + elem->last_i_subtype == OCSD_S_INSTR_BR_LINK) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_CALL; + + /* Return instruction for function return. */ + if (elem->last_i_type == OCSD_INSTR_BR_INDIRECT && + elem->last_i_subtype == OCSD_S_INSTR_V8_RET) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_RETURN; + + break; + + case OCSD_GEN_TRC_ELEM_EXCEPTION: + +#define OCSD_EXC_RESET 0 +#define OCSD_EXC_DEBUG_HALT 1 +#define OCSD_EXC_CALL 2 +#define OCSD_EXC_TRAP 3 +#define OCSD_EXC_SYSTEM_ERROR 4 +#define OCSD_EXC_INST_DEBUG 6 +#define OCSD_EXC_DATA_DEBUG 7 +#define OCSD_EXC_ALIGNMENT 10 +#define OCSD_EXC_INST_FAULT 11 +#define OCSD_EXC_DATA_FAULT 12 +#define OCSD_EXC_IRQ 14 +#define OCSD_EXC_FIQ 15 + + exc_num = decoder->exc_num[packet->cpu]; + + /* + * The exceptions are triggered by external signals + * from bus, interrupt controller, debug module, + * PE reset or halt. + */ + if (exc_num == OCSD_EXC_RESET || + exc_num == OCSD_EXC_DEBUG_HALT || + exc_num == OCSD_EXC_SYSTEM_ERROR || + exc_num == OCSD_EXC_INST_DEBUG || + exc_num == OCSD_EXC_DATA_DEBUG || + exc_num == OCSD_EXC_IRQ || + exc_num == OCSD_EXC_FIQ) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_CALL | + PERF_IP_FLAG_ASYNC | + PERF_IP_FLAG_INTERRUPT; + + /* The exception is for system call. */ + if (exc_num == OCSD_EXC_CALL) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_CALL | + PERF_IP_FLAG_SYSCALLRET; + + /* + * The exception is introduced by trap, instruction & + * data fault or alignment errors. + */ + if (exc_num == OCSD_EXC_TRAP || + exc_num == OCSD_EXC_ALIGNMENT || + exc_num == OCSD_EXC_INST_FAULT || + exc_num == OCSD_EXC_DATA_FAULT) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_CALL | + PERF_IP_FLAG_INTERRUPT; + + break; + + case OCSD_GEN_TRC_ELEM_EXCEPTION_RET: + + exc_num = decoder->exc_num[packet->cpu]; + + if (exc_num == OCSD_EXC_CALL) + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_RETURN | + PERF_IP_FLAG_SYSCALLRET; + else + packet->flags = PERF_IP_FLAG_BRANCH | + PERF_IP_FLAG_RETURN | + PERF_IP_FLAG_INTERRUPT; + + break; + + case OCSD_GEN_TRC_ELEM_UNKNOWN: + case OCSD_GEN_TRC_ELEM_PE_CONTEXT: + case OCSD_GEN_TRC_ELEM_ADDR_NACC: + case OCSD_GEN_TRC_ELEM_TIMESTAMP: + case OCSD_GEN_TRC_ELEM_CYCLE_COUNT: + case OCSD_GEN_TRC_ELEM_ADDR_UNKNOWN: + case OCSD_GEN_TRC_ELEM_EVENT: + case OCSD_GEN_TRC_ELEM_SWTRACE: + case OCSD_GEN_TRC_ELEM_CUSTOM: + default: + break; + } +} + static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer( const void *context, const ocsd_trc_index_t indx __maybe_unused, @@ -462,6 +628,8 @@ static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer( break; }
+ cs_etm_decoder__set_sample_flags(context, elem); + return resp; }
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h index 217bcc6..34e093e 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h @@ -46,6 +46,7 @@ struct cs_etm_packet { u8 last_instr_taken_branch; u8 last_instr_size; int cpu; + u32 flags; };
struct cs_etm_queue;
We have prepared the flags in the packet structure, so need to copy the related value into sample structure thus perf tool can facilitate sample flags.
The PREV_PACKET contains the branch instruction flags and PACKET actually contains the flags for next branch instruction. So this patch is to set sample flags with 'etmq->prev_packet->flags'.
This patch includes two fixing up: if there has TRACE_ON packet in the middle of instruction packets, the TRACE_ON packet indicates the trace is discontinuous, so append the flag PERF_IP_FLAG_TRACE_END to the previous packet; if the coming packet is exception packet or exception return packet, also update the previous packet for exception specific flags.
Signed-off-by: Leo Yan leo.yan@linaro.org --- tools/perf/util/cs-etm.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 00a95d7..7e36dcf 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -655,7 +655,7 @@ static int cs_etm__synth_instruction_sample(struct cs_etm_queue *etmq, sample.stream_id = etmq->etm->instructions_id; sample.period = period; sample.cpu = etmq->packet->cpu; - sample.flags = 0; + sample.flags = etmq->prev_packet->flags; sample.insn_len = 1; sample.cpumode = event->header.misc;
@@ -711,7 +711,7 @@ static int cs_etm__synth_branch_sample(struct cs_etm_queue *etmq) sample.stream_id = etmq->etm->branches_id; sample.period = 1; sample.cpu = etmq->packet->cpu; - sample.flags = 0; + sample.flags = etmq->prev_packet->flags; sample.cpumode = PERF_RECORD_MISC_USER;
/* @@ -945,9 +945,13 @@ static int cs_etm__exception(struct cs_etm_queue *etmq) * The exception packet includes the dummy address values, so don't * swap PACKET with PREV_PACKET. This keeps PREV_PACKET to be useful * for generating instruction and branch samples. + * + * Also update flags so can tell perf it is exception related. */ - if (etmq->prev_packet->sample_type == CS_ETM_RANGE) + if (etmq->prev_packet->sample_type == CS_ETM_RANGE) { etmq->prev_packet->last_instr_taken_branch = true; + etmq->prev_packet->flags = etmq->packet->flags; + }
return 0; } @@ -965,6 +969,14 @@ static int cs_etm__flush(struct cs_etm_queue *etmq) if (etmq->prev_packet->sample_type == CS_ETM_EMPTY) goto swap_packet;
+ /* + * The start tracing packet is in the middle of instruction range + * packets, this means the trace is discontinuous; so need to set + * the previous packet flag to PERF_IP_FLAG_TRACE_END. + */ + if (etmq->prev_packet->sample_type == CS_ETM_RANGE) + etmq->prev_packet->flags |= PERF_IP_FLAG_TRACE_END; + if (etmq->etm->synth_opts.last_branch && etmq->prev_packet->sample_type == CS_ETM_RANGE) { /*
-
Leo Yan