These patches fix some issues with the branch stacks generated from
CoreSight ETM trace.
The main issues addressed are:
- The branch stack should only contain taken branches.
- The instruction samples are generated using the period specified by the
--itrace option to perf inject. Currently, the period can only be
specified as an instruction count - further work is required to specify
the period as a cycle count or time interval.
- The ordering of the branch stack should have newest branch first.
- Some minor fixes to the address calculations.
With these fixes, the branch stacks are more similar to the last branch
records produced by 'perf record -b' and Intel-PT on x86. There are
similar improvements in the autofdo profiles generated from these traces.
The patches apply to the autoFDO branch of
https://github.com/Linaro/perf-opencsd.git (d3fa0f7)
Regards
Robert Walker
Robert Walker (2):
Revert "perf inject: record branches in chronological order"
perf: Fix branch stack records from CoreSight ETM decode
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 4 +-
tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 2 +-
tools/perf/util/cs-etm.c | 134 +++++++++++++-----------
3 files changed, 73 insertions(+), 67 deletions(-)
--
1.9.1
The TMC-ETR supports routing the Coresight trace data to the
System memory. It supports two different modes in which the memory
could be used.
1) Contiguous memory - The memory is assumed to be physically
contiguous.
2) Scatter Gather list - The memory can be chunks of 4K pages,
which are specified in a table of pointers which itself could be
multiple 4K size pages.
To avoid the complications of the managing the buffer, this series
adds a layer for managing the ETR buffer, which makes the best possibly
choice based on what is available. The allocation can be tuned by passing
in flags, existing pages (e.g, perf ring buffer) etc.
Towards supporting ETR Scatter Gather mode, we introduce a generic TMC
scatter-gather table which can be used to manage the data and table pages.
The table can be filled in the format expected by the Scatter-Gather
mode.
The TMC ETR-SG mechanism doesn't allow starting the trace at non-zero
offset (required by perf). So we make some tricky changes to the table
at run time to allow starting at any "Page aligned" offset and then
wrap around to the beginning of the buffer with very less overhead.
See patches for more description.
The series also improves the way the ETR is controlled by different modes
(sysfs vs. perf) by keeping mode specific data. This allows access
to the trace data collected in sysfs mode, even when the ETR is
operated in perf mode. Also with the transparent management of the
buffer and scatter-gather mechanism, we can allow the user to
request for larger trace buffers for sysfs mode. This is supported
by providing a sysfs file, "buffer_size" which accepts a page aligned
size, which will be used by the ETR when allocating a buffer.
Finally, it cleans up the etm perf sink callbacks a little bit and
then adds the support for ETR sink. For the ETR, we try our best to
use the perf ring buffer as the target hardware buffer, provided :
1) The ETR is dma coherent (since the pages will be shared with
userspace perf tool).
2) The perf is used in snapshot mode (The ETR cannot be stopped
based on the size of the data written hence we could easily
overwrite the buffer. We may be able to fix this in the future)
3) The ETR supports the Scatter-Gather mode.
If we can't use the perf buffers directly, we fallback to using
software buffering where we have to copy the trace data back
to the perf ring buffer.
Suzuki K Poulose (17):
coresight etr: Disallow perf mode temporarily
coresight tmc: Hide trace buffer handling for file read
coresight: Add helper for inserting synchronization packets
coresight: Add generic TMC sg table framework
coresight: Add support for TMC ETR SG unit
coresight: tmc: Make ETR SG table circular
coresight: tmc etr: Add transparent buffer management
coresight: tmc: Add configuration support for trace buffer size
coresight: Convert driver messages to dev_dbg
coresight: etr: Track if the device is coherent
coresight etr: Handle driver mode specific ETR buffers
coresight etr: Relax collection of trace from sysfs mode
coresight etr: Do not clean ETR trace buffer
coresight: etr: Add support for save restore buffers
coresight: etr_buf: Add helper for padding an area of trace data
coresight: perf: Remove reset_buffer call back for sinks
coresight perf: Add ETR backend support for etm-perf
.../ABI/testing/sysfs-bus-coresight-devices-tmc | 8 +
.../coresight/coresight-dynamic-replicator.c | 4 +-
drivers/hwtracing/coresight/coresight-etb10.c | 72 +-
drivers/hwtracing/coresight/coresight-etm-perf.c | 9 +-
drivers/hwtracing/coresight/coresight-etm3x.c | 4 +-
drivers/hwtracing/coresight/coresight-etm4x.c | 4 +-
drivers/hwtracing/coresight/coresight-funnel.c | 4 +-
drivers/hwtracing/coresight/coresight-priv.h | 8 +
drivers/hwtracing/coresight/coresight-replicator.c | 4 +-
drivers/hwtracing/coresight/coresight-stm.c | 4 +-
drivers/hwtracing/coresight/coresight-tmc-etf.c | 109 +-
drivers/hwtracing/coresight/coresight-tmc-etr.c | 1665 ++++++++++++++++++--
drivers/hwtracing/coresight/coresight-tmc.c | 75 +-
drivers/hwtracing/coresight/coresight-tmc.h | 128 +-
drivers/hwtracing/coresight/coresight-tpiu.c | 4 +-
include/linux/coresight.h | 5 +-
16 files changed, 1837 insertions(+), 270 deletions(-)
--
2.13.6
Hi, I’ve recently acquired a ZedBoard with the Zynq-7000 SoC and was interested in finding out if I could use `perf` as described on https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md to grab trace data.
Unfortunately, zynq-7000.dtsi on (recent) Linux kernels does not yet contain the necessary device definitions, and zynq-zed.dts wasn’t even syntactically correct (but it was just the syntax for the include-statement, so easy to fix).
Based on Muhammad Wahab’s patch floating around the interwebs and studying the Zynq manual, I enabled support for some more of the devices (like the tpiu) in the devicetree.
But most crucially (I guess), I can’t identify what “etr” in the HOWTO corresponds to on the Zynq. This means that the sample line from the HOWTO above
$ ./tools/perf/perf record -e cs_etm/(a)20070000.etr/ --per-thread uname
won’t work.
Does anyone have experience in configuring the devicetree correctly for the Zynq? Should the perf-incantation on the Zynq also use .etr, or is there some other mechanism that perf can use on the Zynq?
Sincerely,
Volker Stolz
Good day all,
The kernel branches on the openCSD repository[1] have been moved to
their new living quarters [2] and the HOWTO.md on [1] modified to
reflect that. All we need to do is remove the kernel branches from
[1], something I'm planning to do by end of business on Monday.
Please get back to me if you need more time so that we can sketch out
a plan.
Thanks,
Mathieu
[1]. https://github.com/Linaro/OpenCSD
[2]. https://github.com/Linaro/perf-opencsd
Good morning Reza,
As highlighted in yesterday's email the best way to get involved in
the CoreSight project is to subscribe to the mailing list [1] and
attend the meeting we hold every two weeks in the #linaro-coresight
channel on freenode. The next meeting is scheduled for October 18th @
4PM (UTC).
As for STM, Chunyan wrote documentation that is available in the
kernel tree [2].
It would be interesting if you guys could come up with a list of items
that you want to see addressed. From there we could post them to the
perf-opencsd wiki (to be officially published imminently) and have
some sort of a tick list for items that are currently being worked on
and those up for grab.
Best regards,
Mathieu
[1]. https://lists.linaro.org/mailman/listinfo/coresight
[2]. http://elixir.free-electrons.com/linux/latest/source/Documentation/trace/st…
Modifyting instructions to point to the new kernel repository on
gitHub so that kernel related branches in the openCSD repository
can be delete.
Signed-off-by: Mathieu Poirier <mathieu.poirier(a)linaro.org>
---
HOWTO.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/HOWTO.md b/HOWTO.md
index 835def5765e6..dd4fe2057548 100644
--- a/HOWTO.md
+++ b/HOWTO.md
@@ -7,8 +7,8 @@ This HOWTO explains how to use the perf cmd line tools and the openCSD
library to collect and extract program flow traces generated by the
CoreSight IP blocks on a Linux system. The examples have been generated using
an aarch64 Juno-r0 platform. All information is considered accurate and tested
-using library version v0.6 and the `perf-opencsd-master` branch on the
-[OpenCSD github repository][1].
+using the latest version of the library and the `master` branch on the
+[perf-opencsd github repository][1].
On Target Trace Acquisition - Perf Record
@@ -280,7 +280,7 @@ As stated above not all the pieces of the solution have been upstreamed. To
get all the components the latest `perf-opencsd-master` needs to be
obtained:
- linaro@t430:~/linaro/coresight$ git clone -b perf-opencsd-master https://github.com/Linaro/OpenCSD.git perf-opencsd-master
+ linaro@t430:~/linaro/coresight$ git clone -b perf-opencsd-master https://github.com/Linaro/perf-opencsd.git perf-opencsd-master
...
...
@@ -586,7 +586,7 @@ Best regards,
*The Linaro CoreSight Team*
--------------------------------------
-[1]: https://github.com/Linaro/OpenCSD "OpenCSD Github"
+[1]: https://github.com/Linaro/perf-opencsd "perf-opencsd Github"
[2]: http://people.linaro.org/~mathieu.poirier/openCSD/uname.v4.user.sept20.tgz
--
2.7.4