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from 799fecc5f3b [RISC-V][V2] Improve spill code for RVV slightly to fix reg [...] new 35b6620f18d ifcvt: cond zero arith: opencode helper noce_bbs_ok_for_con [...] new 65eabc8c6f7 ifcvt: cond zero arith: factor out common noce_emit_czero e [...] new 817b03a2fb8 ifcvt: cond zero arith: re-expand output pattern [NFC] new 2a84a753afc ifcvt: cond zero arith: elide short forward branch for sign [...] new ac64ceb33bf ifcvt: cond zero arith: handle subreg for shift count
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Summary of changes: gcc/ifcvt.cc | 212 ++++++++-------------- gcc/testsuite/gcc.target/riscv/pr122769.c | 17 ++ gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c | 2 +- 3 files changed, 91 insertions(+), 140 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr122769.c