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from 59e688be49a tree-optimization/122589 - imm use iterator checking fallout new dd305514bbc RISC-V: Combine vsext.vf2 and vsll.vi to vwsll.vi on ZVBB new 0376ac1da3d Match: Refactor bit_ior based unsigned SAT_MUL pattern by w [...]
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Summary of changes: gcc/config/riscv/autovec-opt.md | 41 ++++++++++++++ gcc/match.pd | 44 +++------------ .../gcc.target/riscv/rvv/autovec/pr121959-1.c | 9 +++ .../gcc.target/riscv/rvv/autovec/pr121959-2.c | 9 +++ .../gcc.target/riscv/rvv/autovec/pr121959-3.c | 9 +++ .../gcc.target/riscv/rvv/autovec/pr121959-4.c | 9 +++ .../gcc.target/riscv/rvv/autovec/pr121959-5.c | 9 +++ .../gcc.target/riscv/rvv/autovec/pr121959-run-1.c | 65 ++++++++++++++++++++++ .../gcc.target/riscv/rvv/autovec/pr121959.h | 24 ++++++++ 9 files changed, 184 insertions(+), 35 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959-run-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121959.h