.cpu generic
	.file	"fcp.c"
	.text
	.align	2
	.global	fcp
	.type	fcp, %function
fcp:
	cmp	w0, wzr
	ldr	x6, [x1,48]
	ble	.L16
.L12:
	ldr	x2, [x1,24]
	ldr	x3, [x1,32]
	cmp	x6, x2
	bcc	.L4
	sub	x7, x6, x2
	lsr	x7, x7, 7
	add	x4, x7, 1
	add	x5, x3, x4, lsl 9
	cmp	x2, x5
	bcc	.L17
.L13:
	add	x4, x2, 128
	add	x7, x4, x7, lsl 7
.L9:
	mov	x5, x2
	ld1	{v7.16b}, [x5],16
	add	x8, x2, 32
	ld1	{v6.16b}, [x5]
	add	x5, x2, 64
	ld1	{v5.16b}, [x8]
	ld1	{v3.16b}, [x5]
	add	x8, x2, 48
	add	x5, x2, 96
	ld1	{v4.16b}, [x8]
	ld1	{v1.16b}, [x5]
	mov	x4, x3
	add	x5, x2, 112
	ushll v16.8h, v7.8b, 0
	ld1	{v0.16b}, [x5]
	add	x8, x2, 80
	ushll v17.4s, v16.4h, 0
	ld1	{v2.16b}, [x8]
	ushll2 v16.4s, v16.8h, 0
	st1	{v17.4s}, [x4],16
	st1	{v16.4s}, [x4]
	ushll2 v7.8h, v7.16b, 0
	add	x4, x3, 32
	ushll v16.4s, v7.4h, 0
	st1	{v16.4s}, [x4]
	ushll2 v7.4s, v7.8h, 0
	add	x4, x3, 48
	st1	{v7.4s}, [x4]
	ushll v7.8h, v6.8b, 0
	add	x4, x3, 64
	ushll v16.4s, v7.4h, 0
	st1	{v16.4s}, [x4]
	ushll2 v7.4s, v7.8h, 0
	add	x4, x3, 80
	st1	{v7.4s}, [x4]
	ushll2 v6.8h, v6.16b, 0
	add	x4, x3, 96
	ushll v7.4s, v6.4h, 0
	st1	{v7.4s}, [x4]
	ushll2 v6.4s, v6.8h, 0
	add	x4, x3, 112
	st1	{v6.4s}, [x4]
	ushll v6.8h, v5.8b, 0
	add	x4, x3, 128
	ushll v7.4s, v6.4h, 0
	st1	{v7.4s}, [x4]
	ushll2 v6.4s, v6.8h, 0
	add	x4, x3, 144
	st1	{v6.4s}, [x4]
	ushll2 v5.8h, v5.16b, 0
	add	x4, x3, 160
	ushll v6.4s, v5.4h, 0
	st1	{v6.4s}, [x4]
	ushll2 v5.4s, v5.8h, 0
	add	x4, x3, 176
	st1	{v5.4s}, [x4]
	ushll v5.8h, v4.8b, 0
	add	x4, x3, 192
	ushll v6.4s, v5.4h, 0
	st1	{v6.4s}, [x4]
	ushll2 v5.4s, v5.8h, 0
	add	x4, x3, 208
	st1	{v5.4s}, [x4]
	ushll2 v4.8h, v4.16b, 0
	add	x4, x3, 224
	ushll v5.4s, v4.4h, 0
	st1	{v5.4s}, [x4]
	ushll2 v4.4s, v4.8h, 0
	add	x4, x3, 240
	st1	{v4.4s}, [x4]
	ushll v4.8h, v3.8b, 0
	add	x4, x3, 256
	ushll v5.4s, v4.4h, 0
	st1	{v5.4s}, [x4]
	ushll2 v4.4s, v4.8h, 0
	add	x4, x3, 272
	st1	{v4.4s}, [x4]
	ushll2 v3.8h, v3.16b, 0
	add	x4, x3, 288
	ushll v4.4s, v3.4h, 0
	st1	{v4.4s}, [x4]
	ushll2 v3.4s, v3.8h, 0
	add	x4, x3, 304
	st1	{v3.4s}, [x4]
	ushll v3.8h, v2.8b, 0
	add	x4, x3, 320
	ushll v4.4s, v3.4h, 0
	st1	{v4.4s}, [x4]
	ushll2 v3.4s, v3.8h, 0
	add	x4, x3, 336
	st1	{v3.4s}, [x4]
	ushll2 v2.8h, v2.16b, 0
	add	x4, x3, 352
	ushll v3.4s, v2.4h, 0
	st1	{v3.4s}, [x4]
	ushll2 v2.4s, v2.8h, 0
	add	x4, x3, 368
	st1	{v2.4s}, [x4]
	ushll v2.8h, v1.8b, 0
	add	x4, x3, 384
	ushll v3.4s, v2.4h, 0
	st1	{v3.4s}, [x4]
	ushll2 v1.8h, v1.16b, 0
	add	x4, x3, 416
	add	x5, x3, 400
	ushll2 v2.4s, v2.8h, 0
	ushll v3.4s, v1.4h, 0
	st1	{v2.4s}, [x5]
	st1	{v3.4s}, [x4]
	ushll2 v1.4s, v1.8h, 0
	add	x4, x3, 432
	st1	{v1.4s}, [x4]
	ushll v1.8h, v0.8b, 0
	add	x4, x3, 448
	ushll v2.4s, v1.4h, 0
	st1	{v2.4s}, [x4]
	ushll2 v1.4s, v1.8h, 0
	add	x4, x3, 464
	add	x2, x2, 128
	st1	{v1.4s}, [x4]
	ushll2 v0.8h, v0.16b, 0
	add	x4, x3, 480
	ushll v1.4s, v0.4h, 0
	cmp	x2, x7
	st1	{v1.4s}, [x4]
	ushll2 v0.4s, v0.8h, 0
	add	x4, x3, 496
	st1	{v0.4s}, [x4]
	add	x3, x3, 512
	bne	.L9
.L4:
	sub	w0, w0, #1
	cmp	w0, wzr
	bgt	.L12
.L16:
	ret
.L17:
	add	x4, x2, x4, lsl 7
	cmp	x3, x4
	bcs	.L13
.L11:
	ldrb	w4, [x2]
	add	x2, x2, 128
	str	w4, [x3]
	cmp	x6, x2
	ldrb	w4, [x2,-127]
	str	w4, [x3,4]
	ldrb	w4, [x2,-126]
	str	w4, [x3,8]
	ldrb	w4, [x2,-125]
	str	w4, [x3,12]
	ldrb	w4, [x2,-124]
	str	w4, [x3,16]
	ldrb	w4, [x2,-123]
	str	w4, [x3,20]
	ldrb	w4, [x2,-122]
	str	w4, [x3,24]
	ldrb	w4, [x2,-121]
	str	w4, [x3,28]
	ldrb	w4, [x2,-120]
	str	w4, [x3,32]
	ldrb	w4, [x2,-119]
	str	w4, [x3,36]
	ldrb	w4, [x2,-118]
	str	w4, [x3,40]
	ldrb	w4, [x2,-117]
	str	w4, [x3,44]
	ldrb	w4, [x2,-116]
	str	w4, [x3,48]
	ldrb	w4, [x2,-115]
	str	w4, [x3,52]
	ldrb	w4, [x2,-114]
	str	w4, [x3,56]
	ldrb	w4, [x2,-113]
	str	w4, [x3,60]
	ldrb	w4, [x2,-112]
	str	w4, [x3,64]
	ldrb	w4, [x2,-111]
	str	w4, [x3,68]
	ldrb	w4, [x2,-110]
	str	w4, [x3,72]
	ldrb	w4, [x2,-109]
	str	w4, [x3,76]
	ldrb	w4, [x2,-108]
	str	w4, [x3,80]
	ldrb	w4, [x2,-107]
	str	w4, [x3,84]
	ldrb	w4, [x2,-106]
	str	w4, [x3,88]
	ldrb	w4, [x2,-105]
	str	w4, [x3,92]
	ldrb	w4, [x2,-104]
	str	w4, [x3,96]
	ldrb	w4, [x2,-103]
	str	w4, [x3,100]
	ldrb	w4, [x2,-102]
	str	w4, [x3,104]
	ldrb	w4, [x2,-101]
	str	w4, [x3,108]
	ldrb	w4, [x2,-100]
	str	w4, [x3,112]
	ldrb	w4, [x2,-99]
	str	w4, [x3,116]
	ldrb	w4, [x2,-98]
	str	w4, [x3,120]
	ldrb	w4, [x2,-97]
	str	w4, [x3,124]
	ldrb	w4, [x2,-96]
	str	w4, [x3,128]
	ldrb	w4, [x2,-95]
	str	w4, [x3,132]
	ldrb	w4, [x2,-94]
	str	w4, [x3,136]
	ldrb	w4, [x2,-93]
	str	w4, [x3,140]
	ldrb	w4, [x2,-92]
	str	w4, [x3,144]
	ldrb	w4, [x2,-91]
	str	w4, [x3,148]
	ldrb	w4, [x2,-90]
	str	w4, [x3,152]
	ldrb	w4, [x2,-89]
	str	w4, [x3,156]
	ldrb	w4, [x2,-88]
	str	w4, [x3,160]
	ldrb	w4, [x2,-87]
	str	w4, [x3,164]
	ldrb	w4, [x2,-86]
	str	w4, [x3,168]
	ldrb	w4, [x2,-85]
	str	w4, [x3,172]
	ldrb	w4, [x2,-84]
	str	w4, [x3,176]
	ldrb	w4, [x2,-83]
	str	w4, [x3,180]
	ldrb	w4, [x2,-82]
	str	w4, [x3,184]
	ldrb	w4, [x2,-81]
	str	w4, [x3,188]
	ldrb	w4, [x2,-80]
	str	w4, [x3,192]
	ldrb	w4, [x2,-79]
	str	w4, [x3,196]
	ldrb	w4, [x2,-78]
	str	w4, [x3,200]
	ldrb	w4, [x2,-77]
	str	w4, [x3,204]
	ldrb	w4, [x2,-76]
	str	w4, [x3,208]
	ldrb	w4, [x2,-75]
	str	w4, [x3,212]
	ldrb	w4, [x2,-74]
	str	w4, [x3,216]
	ldrb	w4, [x2,-73]
	str	w4, [x3,220]
	ldrb	w4, [x2,-72]
	str	w4, [x3,224]
	ldrb	w4, [x2,-71]
	str	w4, [x3,228]
	ldrb	w4, [x2,-70]
	str	w4, [x3,232]
	ldrb	w4, [x2,-69]
	str	w4, [x3,236]
	ldrb	w4, [x2,-68]
	str	w4, [x3,240]
	ldrb	w4, [x2,-67]
	str	w4, [x3,244]
	ldrb	w4, [x2,-66]
	str	w4, [x3,248]
	ldrb	w4, [x2,-65]
	str	w4, [x3,252]
	add	x3, x3, 512
	ldrb	w4, [x2,-64]
	str	w4, [x3,-256]
	ldrb	w4, [x2,-63]
	str	w4, [x3,-252]
	ldrb	w4, [x2,-62]
	str	w4, [x3,-248]
	ldrb	w4, [x2,-61]
	str	w4, [x3,-244]
	ldrb	w4, [x2,-60]
	str	w4, [x3,-240]
	ldrb	w4, [x2,-59]
	str	w4, [x3,-236]
	ldrb	w4, [x2,-58]
	str	w4, [x3,-232]
	ldrb	w4, [x2,-57]
	str	w4, [x3,-228]
	ldrb	w4, [x2,-56]
	str	w4, [x3,-224]
	ldrb	w4, [x2,-55]
	str	w4, [x3,-220]
	ldrb	w4, [x2,-54]
	str	w4, [x3,-216]
	ldrb	w4, [x2,-53]
	str	w4, [x3,-212]
	ldrb	w4, [x2,-52]
	str	w4, [x3,-208]
	ldrb	w4, [x2,-51]
	str	w4, [x3,-204]
	ldrb	w4, [x2,-50]
	str	w4, [x3,-200]
	ldrb	w4, [x2,-49]
	str	w4, [x3,-196]
	ldrb	w4, [x2,-48]
	str	w4, [x3,-192]
	ldrb	w4, [x2,-47]
	str	w4, [x3,-188]
	ldrb	w4, [x2,-46]
	str	w4, [x3,-184]
	ldrb	w4, [x2,-45]
	str	w4, [x3,-180]
	ldrb	w4, [x2,-44]
	str	w4, [x3,-176]
	ldrb	w4, [x2,-43]
	str	w4, [x3,-172]
	ldrb	w4, [x2,-42]
	str	w4, [x3,-168]
	ldrb	w4, [x2,-41]
	str	w4, [x3,-164]
	ldrb	w4, [x2,-40]
	str	w4, [x3,-160]
	ldrb	w4, [x2,-39]
	str	w4, [x3,-156]
	ldrb	w4, [x2,-38]
	str	w4, [x3,-152]
	ldrb	w4, [x2,-37]
	str	w4, [x3,-148]
	ldrb	w4, [x2,-36]
	str	w4, [x3,-144]
	ldrb	w4, [x2,-35]
	str	w4, [x3,-140]
	ldrb	w4, [x2,-34]
	str	w4, [x3,-136]
	ldrb	w4, [x2,-33]
	str	w4, [x3,-132]
	ldrb	w4, [x2,-32]
	str	w4, [x3,-128]
	ldrb	w4, [x2,-31]
	str	w4, [x3,-124]
	ldrb	w4, [x2,-30]
	str	w4, [x3,-120]
	ldrb	w4, [x2,-29]
	str	w4, [x3,-116]
	ldrb	w4, [x2,-28]
	str	w4, [x3,-112]
	ldrb	w4, [x2,-27]
	str	w4, [x3,-108]
	ldrb	w4, [x2,-26]
	str	w4, [x3,-104]
	ldrb	w4, [x2,-25]
	str	w4, [x3,-100]
	ldrb	w4, [x2,-24]
	str	w4, [x3,-96]
	ldrb	w4, [x2,-23]
	str	w4, [x3,-92]
	ldrb	w4, [x2,-22]
	str	w4, [x3,-88]
	ldrb	w4, [x2,-21]
	str	w4, [x3,-84]
	ldrb	w4, [x2,-20]
	str	w4, [x3,-80]
	ldrb	w4, [x2,-19]
	str	w4, [x3,-76]
	ldrb	w4, [x2,-18]
	str	w4, [x3,-72]
	ldrb	w4, [x2,-17]
	str	w4, [x3,-68]
	ldrb	w4, [x2,-16]
	str	w4, [x3,-64]
	ldrb	w4, [x2,-15]
	str	w4, [x3,-60]
	ldrb	w4, [x2,-14]
	str	w4, [x3,-56]
	ldrb	w4, [x2,-13]
	str	w4, [x3,-52]
	ldrb	w4, [x2,-12]
	str	w4, [x3,-48]
	ldrb	w4, [x2,-11]
	str	w4, [x3,-44]
	ldrb	w4, [x2,-10]
	str	w4, [x3,-40]
	ldrb	w4, [x2,-9]
	str	w4, [x3,-36]
	ldrb	w4, [x2,-8]
	str	w4, [x3,-32]
	ldrb	w4, [x2,-7]
	str	w4, [x3,-28]
	ldrb	w4, [x2,-6]
	str	w4, [x3,-24]
	ldrb	w4, [x2,-5]
	str	w4, [x3,-20]
	ldrb	w4, [x2,-4]
	str	w4, [x3,-16]
	ldrb	w4, [x2,-3]
	str	w4, [x3,-12]
	ldrb	w4, [x2,-2]
	str	w4, [x3,-8]
	ldrb	w4, [x2,-1]
	str	w4, [x3,-4]
	bcs	.L11
	b	.L4
	.size	fcp, .-fcp
	.ident	"GCC: (Linaro GCC 4.8-2014.04) 4.8.3 20140401 (prerelease)"