>From 5bf8d386656d6ebbefcfbe3a75086c4c19265b03 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Wed, 19 Dec 2012 13:41:26 +0000
Subject: [PATCH] arm64: DT: fix GIC and timer entries for the Foundation model

The DT entries for the GIC and generic timers are either wrong
or incomplete:
- GIC is actually modeled after an A15 GIC, with a slightly
  different mapping and support for virtualisation
- The timers have 4 different interrupts (phys secure, phys
  non-secure, virtual, hyp).

With these changes, I'm able to boot KVM/arm64 on the Foundation
model.

Cc: Omar Ramirez Luna <omar.luna@linaro.org>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Brian Foley <brian.foley@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/boot/dts/vexpress-foundation-v8.dts | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/vexpress-foundation-v8.dts b/arch/arm64/boot/dts/vexpress-foundation-v8.dts
index 5e566a7..3f24052 100644
--- a/arch/arm64/boot/dts/vexpress-foundation-v8.dts
+++ b/arch/arm64/boot/dts/vexpress-foundation-v8.dts
@@ -64,12 +64,15 @@
 	};
 
 	gic: interrupt-controller@2c001000 {
-		compatible = "arm,cortex-a9-gic";
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
 		#address-cells = <0>;
 		interrupt-controller;
 		reg = <0x0 0x2c001000 0x1000>,
-		      <0x0 0x2c002000 0x100>;
+		      <0x0 0x2c002000 0x1000>,
+		      <0x0 0x2c004000 0x2000>,
+		      <0x0 0x2c006000 0x2000>;
+		interrupts = <1 9 0xff04>;
 	};
 
 	pmu {
@@ -79,7 +82,10 @@
 
 	timer {
 		compatible = "arm,armv8-timer";
-		interrupts = <1 14 0xff01>;
+		interrupts = <1 13 0xff01>,
+			     <1 14 0xff01>,
+			     <1 11 0xff01>,
+			     <1 10 0xff01>;
 		clock-frequency = <100000000>;
 	};
 
-- 
1.8.1
