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- Log ----------------------------------------------------------------- commit fd383ebb6ea70350c28227d0b133c4e9c7075997 Author: Petri Savolainen petri.savolainen@linaro.org Date: Wed Nov 14 09:53:54 2018 +0200
linux-gen: build: enable CPU arch specific optimization
When not building in ABI compatible mode, enable compiler optimizations for the CPU architecture of the local machine.
Signed-off-by: Petri Savolainen petri.savolainen@linaro.org Reviewed-by: Dmitry Eremin-Solenikov dmitry.ereminsolenikov@linaro.org Reviewed-by: Bill Fischofer bill.fischofer@linaro.org Signed-off-by: Maxim Uvarov maxim.uvarov@linaro.org
diff --git a/configure.ac b/configure.ac index 68da20df..6715a7ef 100644 --- a/configure.ac +++ b/configure.ac @@ -200,6 +200,7 @@ AC_ARG_ENABLE([abi-compat], abi_compat=no #if there is no ABI compatibility the .so numbers are meaningless ODP_LIBSO_VERSION=0:0:0 + ODP_CHECK_CFLAG([-march=native]) fi]) AM_CONDITIONAL(ODP_ABI_COMPAT, [test "x$ODP_ABI_COMPAT" = "x1"])
commit a78ae2b646fa194a3e148c8577e5c4d4857002da Author: Petri Savolainen petri.savolainen@linaro.org Date: Wed Nov 14 14:39:21 2018 +0200
linux-gen: arm atomic: fix register numbering with casp
ARMv8.1 specific casp() function failed to build due to register numbering issues. CASP instructions require that the first register of a pair is even. Force register numbering to start from even numbers (x0 and x2).
Signed-off-by: Petri Savolainen petri.savolainen@linaro.org Reviewed-by: Dmitry Eremin-Solenikov dmitry.ereminsolenikov@linaro.org Reviewed-by: Bill Fischofer bill.fischofer@linaro.org Signed-off-by: Maxim Uvarov maxim.uvarov@linaro.org
diff --git a/platform/linux-generic/arch/aarch64/odp_atomic.h b/platform/linux-generic/arch/aarch64/odp_atomic.h index 8b6c3aec..8a0e7ce2 100644 --- a/platform/linux-generic/arch/aarch64/odp_atomic.h +++ b/platform/linux-generic/arch/aarch64/odp_atomic.h @@ -108,32 +108,45 @@ static inline __int128 __lockfree_fetch_or_16(__int128 *var, __int128 mask,
#else
-static inline __int128 casp(__int128 *var, __int128 old, __int128 neu, int mo) +static inline __int128_t cas_u128(__int128_t *ptr, __int128_t old_val, + __int128_t new_val, int mo) { + /* CASP instructions require that the first register number is paired */ + register uint64_t old0 __asm__ ("x0"); + register uint64_t old1 __asm__ ("x1"); + register uint64_t new0 __asm__ ("x2"); + register uint64_t new1 __asm__ ("x3"); + + old0 = (uint64_t)old_val; + old1 = (uint64_t)(old_val >> 64); + new0 = (uint64_t)new_val; + new1 = (uint64_t)(new_val >> 64); + if (mo == __ATOMIC_RELAXED) { - __asm__ volatile("casp %0, %H0, %1, %H1, [%2]" - : "+r" (old) - : "r" (neu), "r" (var) + __asm__ volatile("casp %[old0], %[old1], %[new0], %[new1], [%[ptr]]" + : [old0] "+r" (old0), [old1] "+r" (old1) + : [new0] "r" (new0), [new1] "r" (new1), [ptr] "r" (ptr) : "memory"); } else if (mo == __ATOMIC_ACQUIRE) { - __asm__ volatile("caspa %0, %H0, %1, %H1, [%2]" - : "+r" (old) - : "r" (neu), "r" (var) + __asm__ volatile("caspa %[old0], %[old1], %[new0], %[new1], [%[ptr]]" + : [old0] "+r" (old0), [old1] "+r" (old1) + : [new0] "r" (new0), [new1] "r" (new1), [ptr] "r" (ptr) : "memory"); } else if (mo == __ATOMIC_ACQ_REL) { - __asm__ volatile("caspal %0, %H0, %1, %H1, [%2]" - : "+r" (old) - : "r" (neu), "r" (var) + __asm__ volatile("caspal %[old0], %[old1], %[new0], %[new1], [%[ptr]]" + : [old0] "+r" (old0), [old1] "+r" (old1) + : [new0] "r" (new0), [new1] "r" (new1), [ptr] "r" (ptr) : "memory"); } else if (mo == __ATOMIC_RELEASE) { - __asm__ volatile("caspl %0, %H0, %1, %H1, [%2]" - : "+r" (old) - : "r" (neu), "r" (var) + __asm__ volatile("caspl %[old0], %[old1], %[new0], %[new1], [%[ptr]]" + : [old0] "+r" (old0), [old1] "+r" (old1) + : [new0] "r" (new0), [new1] "r" (new1), [ptr] "r" (ptr) : "memory"); } else { abort(); } - return old; + + return ((__int128)old0) | (((__int128)old1) << 64); }
static inline bool @@ -147,7 +160,7 @@ __lockfree_compare_exchange_16(register __int128 *var, __int128 *exp, __int128 expected;
expected = *exp; - old = casp(var, expected, neu, mo_success); + old = cas_u128(var, expected, neu, mo_success); *exp = old; /* Always update, atomically read value */ return old == expected; } @@ -160,7 +173,7 @@ static inline __int128 __lockfree_exchange_16(__int128 *var, __int128 neu,
do { expected = *var; - old = casp(var, expected, neu, mo); + old = cas_u128(var, expected, neu, mo); } while (old != expected); return old; } @@ -173,7 +186,7 @@ static inline __int128 __lockfree_fetch_and_16(__int128 *var, __int128 mask,
do { expected = *var; - old = casp(var, expected, expected & mask, mo); + old = cas_u128(var, expected, expected & mask, mo); } while (old != expected); return old; } @@ -186,7 +199,7 @@ static inline __int128 __lockfree_fetch_or_16(__int128 *var, __int128 mask,
do { expected = *var; - old = casp(var, expected, expected | mask, mo); + old = cas_u128(var, expected, expected | mask, mo); } while (old != expected); return old; }
commit c3e8fb83ed8b5d9017c4fc72ac8ad03bea04b753 Author: Petri Savolainen petri.savolainen@linaro.org Date: Tue Nov 13 16:44:07 2018 +0200
linux-gen: sysinfo: print out ARM build time features
Print out feature flags that were used in build time. The output may be used to check e.g. if binary was built with ARMv8.0 or >= ARMv8.1 instructions.
Signed-off-by: Petri Savolainen petri.savolainen@linaro.org Reviewed-by: Dmitry Eremin-Solenikov dmitry.ereminsolenikov@linaro.org Reviewed-by: Bill Fischofer bill.fischofer@linaro.org Signed-off-by: Maxim Uvarov maxim.uvarov@linaro.org
diff --git a/platform/linux-generic/arch/aarch64/odp_sysinfo_parse.c b/platform/linux-generic/arch/aarch64/odp_sysinfo_parse.c index bcdc2373..3a1486dd 100644 --- a/platform/linux-generic/arch/aarch64/odp_sysinfo_parse.c +++ b/platform/linux-generic/arch/aarch64/odp_sysinfo_parse.c @@ -201,6 +201,76 @@ int cpuinfo_parser(FILE *file, system_info_t *sysinfo)
void sys_info_print_arch(void) { + const char *ndef = "n/a"; + + /* Avoid compiler warning about unused variable */ + (void)ndef; + + /* See ARM C Language Extensions documentation for details */ + printf("ARM FEATURES:\n"); + + printf(" __ARM_ARCH "); +#ifdef __ARM_ARCH + printf("%i\n", __ARM_ARCH); +#else + printf("%s\n", ndef); +#endif + + printf(" __ARM_ARCH_ISA_A64 "); +#ifdef __ARM_ARCH_ISA_A64 + printf("%i\n", __ARM_ARCH_ISA_A64); +#else + printf("%s\n", ndef); +#endif + +#if defined(__ARM_ARCH) && __ARM_ARCH >= 8 + /* Actually, this checks for new NEON instructions in + * v8.1, but is currently the only way to distinguish + * v8.0 and >=v8.1. */ + printf(" ARMv8 ISA version "); +#ifdef __ARM_FEATURE_QRDMX + printf("v8.1 or higher\n"); +#else + printf("v8.0\n"); +#endif +#endif + +#ifdef __ARM_FEATURE_QRDMX + /* Actually, this checks for new NEON instructions in + * v8.1, but is currently the only way to distinguish + * v8.0 and >=v8.1. */ + printf(" ARMv8.1 instructions\n"); +#endif + + printf(" __ARM_NEON "); +#ifdef __ARM_NEON + printf("%i\n", __ARM_NEON); +#else + printf("%s\n", ndef); +#endif + + printf(" __ARM_FEATURE_IDIV "); +#ifdef __ARM_FEATURE_IDIV + printf("%i\n", __ARM_FEATURE_IDIV); +#else + printf("%s\n", ndef); +#endif + + printf(" __ARM_FEATURE_CRYPTO "); +#ifdef __ARM_FEATURE_CRYPTO + printf("%i\n", __ARM_FEATURE_CRYPTO); +#else + printf("%s\n", ndef); +#endif + + printf(" __ARM_FEATURE_CRC32 "); +#ifdef __ARM_FEATURE_CRC32 + printf("%i\n", __ARM_FEATURE_CRC32); +#else + printf("%s\n", ndef); +#endif + + printf("\n"); }
uint64_t odp_cpu_arch_hz_current(int id)
-----------------------------------------------------------------------
Summary of changes: configure.ac | 1 + platform/linux-generic/arch/aarch64/odp_atomic.h | 49 +++++++++------ .../linux-generic/arch/aarch64/odp_sysinfo_parse.c | 70 ++++++++++++++++++++++ 3 files changed, 102 insertions(+), 18 deletions(-)
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